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authorAndrew Waterman <andrew@sifive.com>2019-10-06 21:54:46 +0200
committerAndrew Waterman <andrew@sifive.com>2019-10-06 21:54:46 +0200
commitda9b0752dbe570cf0493f4c7eb790ace845896af (patch)
tree9939e83079beffbf5de87d50b49393006fc2005b /src/a.tex
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Incorporate Anthony Coulter's feedback
https://groups.google.com/a/groups.riscv.org/d/msg/isa-dev/6rpIanfXCVc/SIp_dwvCAgAJ
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diff --git a/src/a.tex b/src/a.tex
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@@ -458,9 +458,10 @@ be discarded by writing to {\tt x0}.
\begin{commentary}
We provided fetch-and-op style atomic primitives as they scale to
-highly parallel systems better than LR/SC or CAS. A simple
-microarchitecture can implement AMOs using the LR/SC primitives. More
-complex implementations might also implement AMOs at memory
+highly parallel systems better than LR/SC or CAS.
+A simple microarchitecture can implement AMOs using the LR/SC primitives,
+provided the implementation can guarantee the AMO eventually completes.
+More complex implementations might also implement AMOs at memory
controllers, and can optimize away fetching the original value when
the destination is {\tt x0}.