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authorAndrew Waterman <andrew@sifive.com>2018-12-10 12:21:03 -0800
committerAndrew Waterman <andrew@sifive.com>2018-12-10 12:21:03 -0800
commitbf33d5feb1290448e97fb5bf395c813923573068 (patch)
treecc6ebfae4a89658b4270a0af7a9bf769673ad433 /src/a.tex
parent42adb492c5b5b3913e20dc84111bc9be3391fb98 (diff)
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subset -> extension
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-rw-r--r--src/a.tex6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/a.tex b/src/a.tex
index 163c52f..c733790 100644
--- a/src/a.tex
+++ b/src/a.tex
@@ -1,8 +1,8 @@
\chapter{``A'' Standard Extension for Atomic Instructions, Version 2.0}
\label{atomics}
-The standard atomic instruction extension is denoted by instruction
-subset name ``A'', and contains instructions that atomically
+The standard atomic-instruction extension, named ``A'',
+contains instructions that atomically
read-modify-write memory to support synchronization between multiple
RISC-V harts running in the same memory space. The two forms of
atomic instruction provided are load-reserved/store-conditional
@@ -149,7 +149,7 @@ sequence plus the code to retry the sequence in case of failure must
comprise at most 16 integer instructions placed sequentially in
memory. For the sequence to be guaranteed to eventually succeed, the
dynamic code executed between the LR and SC instructions can only
-contain other instructions from the base ``I'' subset, excluding
+contain other instructions from the base ``I'' instruction set, excluding
loads, stores, backward jumps or taken backward branches, FENCE,
FENCE.I, and SYSTEM instructions. The code to retry a failing LR/SC
sequence can contain backward jumps and/or branches to repeat the