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author | Andrew Waterman <andrew@sifive.com> | 2022-07-07 13:25:10 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2022-07-07 13:25:23 -0700 |
commit | f518c259c008f926eba4aba67804f62531b6e94b (patch) | |
tree | 65494793edb14827f7159b3122ef7646f26738a7 | |
parent | f983b86303235b13434522aa98927ee0633fa08a (diff) | |
download | riscv-isa-manual-f518c259c008f926eba4aba67804f62531b6e94b.zip riscv-isa-manual-f518c259c008f926eba4aba67804f62531b6e94b.tar.gz riscv-isa-manual-f518c259c008f926eba4aba67804f62531b6e94b.tar.bz2 |
Zmmul is ratified and is now version 1.0
-rw-r--r-- | src/m.tex | 2 | ||||
-rw-r--r-- | src/preface.tex | 1 |
2 files changed, 2 insertions, 1 deletions
@@ -168,7 +168,7 @@ implemented using an unsigned division circuit and specifying the same overflow result simplifies the hardware. \end{commentary} -\section{Zmmul Extension, Version 0.1} +\section{Zmmul Extension, Version 1.0} The Zmmul extension implements the multiplication subset of the M extension. It adds all of the instructions defined in Section~\ref{multiplication-operations}, diff --git a/src/preface.tex b/src/preface.tex index 25acc05..7391877 100644 --- a/src/preface.tex +++ b/src/preface.tex @@ -48,6 +48,7 @@ The document contains the following versions of the RISC-V ISA modules: \bf Zdinx & \bf 1.0 & \bf Ratified \\ \bf Zhinx & \bf 1.0 & \bf Ratified \\ \bf Zhinxmin & \bf 1.0 & \bf Ratified \\ + \bf Zmmul & \bf 1.0 & \bf Ratified \\ \em Ztso & \em 0.1 & \em Frozen \\ \hline \end{tabular} |