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authorBill Traynor <wmat@riscv.org>2023-03-17 16:00:08 -0400
committerBill Traynor <wmat@riscv.org>2023-03-17 16:00:08 -0400
commit49a32dd0eb8d5907ee33cbb369a70856052cc8a1 (patch)
treecefc295a47b498bfca8612e76a6366e15f369af3
parentc08913adfea0b5924af215d6ac3235bff22ad571 (diff)
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Added hip and hie standard diags
Added hip and hie standard diags. Fixed links.
-rw-r--r--src/hypervisor.adoc73
-rw-r--r--src/images/bytefield/hiereg-standard.edn43
-rw-r--r--src/images/bytefield/hiereg.edn13
-rw-r--r--src/images/bytefield/hipreg-standard.edn43
-rw-r--r--src/images/bytefield/hipreg.edn13
-rw-r--r--src/images/bytefield/hvipreg-standard.edn37
-rw-r--r--src/images/bytefield/hvipreg.edn13
7 files changed, 199 insertions, 36 deletions
diff --git a/src/hypervisor.adoc b/src/hypervisor.adoc
index 904577b..ba35104 100644
--- a/src/hypervisor.adoc
+++ b/src/hypervisor.adoc
@@ -333,53 +333,56 @@ Register `hvip` is an HSXLEN-bit read/write register that a hypervisor
can write to indicate virtual interrupts intended for VS-mode. Bits of
`hvip` that are not writable are read-only zeros.
-@J +
- +
-HSXLEN +
+[[hvipreg]]
+.Hypervisor virtual-interrupt-pending register(`hvip`).
+include::images/bytefield/hvipreg.edn[]
The standard portion (bits 15:0) of `hvip` is formatted as shown in
-Figure link:#hvipreg-standard[[hvipreg-standard]]. Bits VSEIP, VSTIP,
+<<hvipreg-standard>>. Bits VSEIP, VSTIP,
and VSSIP of `hvip` are writable. Setting VSEIP=1 in `hvip` asserts a
VS-level external interrupt; setting VSTIP asserts a VS-level timer
interrupt; and setting VSSIP asserts a VS-level software interrupt.
-RcFcFcW & & & & & & +
-& & & & & & +
-& 1 & 3 & 1 & 3 & 1 & 2 +
+[[hvipreg-standard]]
+.Standard portion (bits 15:0) of `hvip`.
+include::images/bytefield/hvipreg-standard.edn[]
Registers `hip` and `hie` are HSXLEN-bit read/write registers that
supplement HS-level’s `sip` and `sie` respectively. The `hip` register
indicates pending VS-level and hypervisor-specific interrupts, while
`hie` contains enable bits for the same interrupts.
-@J +
- +
-HSXLEN +
+[[hipreg]]
+.Hypervisor interrupt-pending register (`hip`).
+include::images/bytefield/hipreg.edn[]
-@J +
- +
-HSXLEN +
+[[hiereg]]
+.Hypervisor interrupt-enable register (`hie`).
+include::images/bytefield/hiereg.edn[]
For each writable bit in `sie`, the corresponding bit shall be read-only
zero in both `hip` and `hie`. Hence, the nonzero bits in `sie` and `hie`
are always mutually exclusive, and likewise for `sip` and `hip`.
+[NOTE]
+====
The active bits of `hip` and `hie` cannot be placed in HS-level’s `sip`
and `sie` because doing so would make it impossible for software to
emulate the hypervisor extension on platforms that do not implement it
in hardware.
+====
-An interrupt _i_ will trap to HS-mode whenever all of the following are
-true: (a) either the current operating mode is HS-mode and the SIE bit
+An interrupt _i_ will trap to HS-mode whenever all of the following are
+true: (a) either the current operating mode is HS-mode and the SIE bit
in the `sstatus` register is set, or the current operating mode has less
-privilege than HS-mode; (b) bit _i_ is set in both `sip` and `sie`, or
-in both `hip` and `hie`; and (c) bit _i_ is not set in `hideleg`.
+privilege than HS-mode; (b) bit _i_ is set in both `sip` and `sie`, or
+in both `hip` and `hie`; and (c) bit _i_ is not set in `hideleg`.
-If bit _i_ of `sie` is read-only zero, the same bit in register `hip`
-may be writable or may be read-only. When bit _i_ in `hip` is writable,
+If bit _i_ of `sie` is read-only zero, the same bit in register `hip`
+may be writable or may be read-only. When bit _i_ in `hip` is writable,
a pending interrupt _i_ can be cleared by writing 0 to this bit. If
-interrupt _i_ can become pending in `hip` but bit _i_ in `hip` is
-read-only, then either the interrupt can be cleared by clearing bit _i_
+interrupt _i_ can become pending in `hip` but bit _i_ in `hip` is
+read-only, then either the interrupt can be cleared by clearing bit _i_
of `hvip`, or the implementation must provide some other mechanism for
clearing the pending interrupt (which may involve a call to the
execution environment).
@@ -389,32 +392,30 @@ become pending in `hip`. Bits of `hie` that are not writable shall be
read-only zero.
The standard portions (bits 15:0) of registers `hip` and `hie` are
-formatted as shown in Figures link:#hipreg-standard[[hipreg-standard]]
-and link:#hiereg-standard[[hiereg-standard]] respectively.
+formatted as shown in <<hipreg-standard>> and <<hiereg-standard>> respectively.
-FcccFcFcW & & & & & & & & +
-& & & & & & & & +
-& 1 & 1 & 1 & 3 & 1 & 3 & 1 & 2 +
+[[hipreg-standard]]
+.Standard portion (bits 15:0) of `hip`.
+include::images/bytefield/hipreg-standard.edn[]
+
+[[hiereg-standard]]
+.Standard portion (bits 15:0) of `hie`.
+include::images/bytefield/hiereg-standard.edn[]
-FcccFcFcW & & & & & & & & +
-& & & & & & & & +
-& 1 & 1 & 1 & 3 & 1 & 3 & 1 & 2 +
Bits `hip`.SGEIP and `hie`.SGEIE are the interrupt-pending and
interrupt-enable bits for guest external interrupts at supervisor level
(HS-level). SGEIP is read-only in `hip`, and is 1 if and only if the
bitwise logical-AND of CSRs `hgeip` and `hgeie` is nonzero in any bit.
-(See Section #sec:hgeinterruptregs[1.2.4].)
+(See <<hgeinterruptregs>>.)
Bits `hip`.VSEIP and `hie`.VSEIE are the interrupt-pending and
interrupt-enable bits for VS-level external interrupts. VSEIP is
read-only in `hip`, and is the logical-OR of these interrupt sources:
-bit VSEIP of `hvip`;
-
-the bit of `hgeip` selected by `hstatus`.VGEIN; and
-
-any other platform-specific external interrupt signal directed to
+* bit VSEIP of `hvip`;
+* the bit of `hgeip` selected by `hstatus`.VGEIN; and
+* any other platform-specific external interrupt signal directed to
VS-level.
Bits `hip`.VSTIP and `hie`.VSTIE are the interrupt-pending and
@@ -430,7 +431,7 @@ Multiple simultaneous interrupts destined for HS-mode are handled in the
following decreasing priority order: SEI, SSI, STI, SGEI, VSEI, VSSI,
VSTI.
-[[sec:hgeinterruptregs]]
+[[hgeinterruptregs]]
==== Hypervisor Guest External Interrupt Registers (`hgeip` and `hgeie`)
The `hgeip` register is an HSXLEN-bit read-only register, formatted as
diff --git a/src/images/bytefield/hiereg-standard.edn b/src/images/bytefield/hiereg-standard.edn
new file mode 100644
index 0000000..2cba575
--- /dev/null
+++ b/src/images/bytefield/hiereg-standard.edn
@@ -0,0 +1,43 @@
+[bytefield]
+----
+(defattrs :plain [:plain {:font-family "M+ 1p Fallback" :font-size 24}])
+(def row-height 40 )
+(def row-header-fn nil)
+(def left-margin 200)
+(def right-margin 200)
+(def boxes-per-row 32)
+
+(draw-box "15" {:span 2 :text-anchor "start" :borders {}})
+(draw-box "13" {:span 2 :text-anchor "end" :borders {}})
+(draw-box "12" {:span 4 :borders {}})
+(draw-box "11" {:span 4 :borders {}})
+(draw-box "10" {:span 4 :borders {}})
+(draw-box "9" {:span 2 :text-anchor "start" :borders {}})
+(draw-box "7" {:span 2 :text-anchor "end" :borders {}})
+(draw-box "6" {:span 4 :borders {}})
+(draw-box "5" {:borders {}})
+(draw-box "3" {:borders {}})
+(draw-box "2" {:span 4 :borders {}})
+(draw-box "1" {:borders {}})
+(draw-box "0" {:borders {}})
+
+(draw-box "0" {:span 4})
+(draw-box "SGEIE" {:span 4})
+(draw-box "0" {:span 4})
+(draw-box "VSEIE" {:span 4})
+(draw-box "0" {:span 4})
+(draw-box "VSTIE" {:span 4})
+(draw-box "0" {:span 2})
+(draw-box "VSSIE" {:span 4})
+(draw-box "0" {:span 2})
+
+(draw-box "3" {:span 4 :borders{}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "3" {:span 4 :borders {}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "3" {:span 2 :borders {}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "2" {:span 2 :borders {}})
+---- \ No newline at end of file
diff --git a/src/images/bytefield/hiereg.edn b/src/images/bytefield/hiereg.edn
new file mode 100644
index 0000000..4c39f28
--- /dev/null
+++ b/src/images/bytefield/hiereg.edn
@@ -0,0 +1,13 @@
+[bytefield]
+----
+(defattrs :plain [:plain {:font-family "M+ 1p Fallback" :font-size 24}])
+(def row-height 40 )
+(def row-header-fn nil)
+(def left-margin 200)
+(def right-margin 200)
+(def boxes-per-row 32)
+(draw-column-headers {:height 24 :font-size 24 :labels (reverse ["0" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "HSXLEN-1" ""])})
+
+(draw-box (text "Interrupts" {:font-size 24 :font-weight "bold"} "(WARL)") {:span 32})
+(draw-box "HSXLEN" {:font-size 24 :span 32 :borders {}})
+---- \ No newline at end of file
diff --git a/src/images/bytefield/hipreg-standard.edn b/src/images/bytefield/hipreg-standard.edn
new file mode 100644
index 0000000..20e36ac
--- /dev/null
+++ b/src/images/bytefield/hipreg-standard.edn
@@ -0,0 +1,43 @@
+[bytefield]
+----
+(defattrs :plain [:plain {:font-family "M+ 1p Fallback" :font-size 24}])
+(def row-height 40 )
+(def row-header-fn nil)
+(def left-margin 200)
+(def right-margin 200)
+(def boxes-per-row 32)
+
+(draw-box "15" {:span 2 :text-anchor "start" :borders {}})
+(draw-box "13" {:span 2 :text-anchor "end" :borders {}})
+(draw-box "12" {:span 4 :borders {}})
+(draw-box "11" {:span 4 :borders {}})
+(draw-box "10" {:span 4 :borders {}})
+(draw-box "9" {:span 2 :text-anchor "start" :borders {}})
+(draw-box "7" {:span 2 :text-anchor "end" :borders {}})
+(draw-box "6" {:span 4 :borders {}})
+(draw-box "5" {:borders {}})
+(draw-box "3" {:borders {}})
+(draw-box "2" {:span 4 :borders {}})
+(draw-box "1" {:borders {}})
+(draw-box "0" {:borders {}})
+
+(draw-box "0" {:span 4})
+(draw-box "SGEIP" {:span 4})
+(draw-box "0" {:span 4})
+(draw-box "VSEIP" {:span 4})
+(draw-box "0" {:span 4})
+(draw-box "VSTIP" {:span 4})
+(draw-box "0" {:span 2})
+(draw-box "VSSIP" {:span 4})
+(draw-box "0" {:span 2})
+
+(draw-box "3" {:span 4 :borders{}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "3" {:span 4 :borders {}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "3" {:span 2 :borders {}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "2" {:span 2 :borders {}})
+---- \ No newline at end of file
diff --git a/src/images/bytefield/hipreg.edn b/src/images/bytefield/hipreg.edn
new file mode 100644
index 0000000..4c39f28
--- /dev/null
+++ b/src/images/bytefield/hipreg.edn
@@ -0,0 +1,13 @@
+[bytefield]
+----
+(defattrs :plain [:plain {:font-family "M+ 1p Fallback" :font-size 24}])
+(def row-height 40 )
+(def row-header-fn nil)
+(def left-margin 200)
+(def right-margin 200)
+(def boxes-per-row 32)
+(draw-column-headers {:height 24 :font-size 24 :labels (reverse ["0" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "HSXLEN-1" ""])})
+
+(draw-box (text "Interrupts" {:font-size 24 :font-weight "bold"} "(WARL)") {:span 32})
+(draw-box "HSXLEN" {:font-size 24 :span 32 :borders {}})
+---- \ No newline at end of file
diff --git a/src/images/bytefield/hvipreg-standard.edn b/src/images/bytefield/hvipreg-standard.edn
new file mode 100644
index 0000000..f68464f
--- /dev/null
+++ b/src/images/bytefield/hvipreg-standard.edn
@@ -0,0 +1,37 @@
+[bytefield]
+----
+(defattrs :plain [:plain {:font-family "M+ 1p Fallback" :font-size 24}])
+(def row-height 40 )
+(def row-header-fn nil)
+(def left-margin 200)
+(def right-margin 200)
+(def boxes-per-row 32)
+
+(draw-box "15" {:span 4 :text-anchor "start" :borders {}})
+(draw-box "11" {:span 4 :text-anchor "end" :borders {}})
+(draw-box "10" {:span 4 :borders {}})
+(draw-box "9" {:span 2 :text-anchor "start" :borders {}})
+(draw-box "7" {:span 2 :text-anchor "end" :borders {}})
+(draw-box "6" {:span 4 :borders {}})
+(draw-box "5" {:span 2 :text-anchor "start" :borders {}})
+(draw-box "3" {:span 2 :text-anchor "end" :borders {}})
+(draw-box "2" {:span 4 :borders {}})
+(draw-box "1" {:span 2 :text-anchor "start" :borders {}})
+(draw-box "0" {:span 2 :text-anchor "end" :borders {}})
+
+(draw-box "0" {:span 8})
+(draw-box "VSEIP" {:span 4})
+(draw-box "0" {:span 4})
+(draw-box "VSTIP" {:span 4})
+(draw-box "0" {:span 4})
+(draw-box "VSSIP" {:span 4})
+(draw-box "0" {:span 4})
+
+(draw-box "5" {:span 8 :borders{}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "3" {:span 4 :borders {}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "3" {:span 4 :borders {}})
+(draw-box "1" {:span 4 :borders {}})
+(draw-box "2" {:span 4 :borders {}})
+---- \ No newline at end of file
diff --git a/src/images/bytefield/hvipreg.edn b/src/images/bytefield/hvipreg.edn
new file mode 100644
index 0000000..981a584
--- /dev/null
+++ b/src/images/bytefield/hvipreg.edn
@@ -0,0 +1,13 @@
+[bytefield]
+----
+(defattrs :plain [:plain {:font-family "M+ 1p Fallback" :font-size 24}])
+(def row-height 40 )
+(def row-header-fn nil)
+(def left-margin 200)
+(def right-margin 200)
+(def boxes-per-row 32)
+(draw-column-headers {:height 24 :font-size 24 :labels (reverse ["0" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "" "HSXLEN-1" ""])})
+
+(draw-box (text "Virtual Interrupts" {:font-size 24 :font-weight "bold"} "(WARL)") {:span 32})
+(draw-box "HSXLEN" {:font-size 24 :span 32 :borders {}})
+---- \ No newline at end of file