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author | Krste Asanovic <krste@eecs.berkeley.edu> | 2022-06-02 11:17:09 -0700 |
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committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2022-06-02 11:17:09 -0700 |
commit | 190ed91590f6f58f3ac3236a8c7081aec1643ae0 (patch) | |
tree | 71aa3ff288e0213ecacef710c2ecf51cc1d55bc9 | |
parent | 3e7b389772b5d909b3dfa2db57e60f73329e5721 (diff) | |
download | riscv-isa-manual-190ed91590f6f58f3ac3236a8c7081aec1643ae0.zip riscv-isa-manual-190ed91590f6f58f3ac3236a8c7081aec1643ae0.tar.gz riscv-isa-manual-190ed91590f6f58f3ac3236a8c7081aec1643ae0.tar.bz2 |
Replaced nonstandard with non-standard.
Closes #851
-rw-r--r-- | src/f.tex | 2 | ||||
-rw-r--r-- | src/hypervisor.tex | 6 | ||||
-rw-r--r-- | src/machine.tex | 2 |
3 files changed, 5 insertions, 5 deletions
@@ -293,7 +293,7 @@ but this decision would have increased hardware cost. Moreover, since this feature is optional in the standard, it cannot be used in portable code. Implementors are free to provide a NaN payload propagation scheme as -a nonstandard extension enabled by a nonstandard operating mode. However, the +a non-standard extension enabled by a non-standard operating mode. However, the canonical NaN scheme described above must always be supported and should be the default mode. \end{commentary} diff --git a/src/hypervisor.tex b/src/hypervisor.tex index d8f79bb..8dbec47 100644 --- a/src/hypervisor.tex +++ b/src/hypervisor.tex @@ -3147,7 +3147,7 @@ zero; \item a transformation of the trapping instruction; \item -a custom value (allowed only if the trapping instruction is nonstandard); +a custom value (allowed only if the trapping instruction is non-standard); or \item a special pseudoinstruction. @@ -3200,7 +3200,7 @@ an instruction encoding that is explicitly designated for a custom instruction (\emph{not} an unused reserved encoding). This is a \textit{custom value}. -The instruction that trapped is a nonstandard instruction. +The instruction that trapped is a non-standard instruction. The interpretation of a custom value is not otherwise specified by this standard. @@ -3245,7 +3245,7 @@ cause. For exceptions that prevent the fetching of an instruction, only zero or a pseudoinstruction value may be written. A custom value may be automatically written only if the instruction that -traps is nonstandard. +traps is non-standard. A future standard or extension may permit other values to be written, chosen from the set of allowed values established earlier. diff --git a/src/machine.tex b/src/machine.tex index abd715f..780c448 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -816,7 +816,7 @@ big-endian-only, with no accommodation for mixing endianness. Nevertheless, endianness control has been defined so as to permit, for instance, an OS of one endianness to execute user-mode programs of the opposite endianness. -Consideration has been given also to the possibility of nonstandard +Consideration has been given also to the possibility of non-standard usages whereby software flips the endianness of memory accesses as needed. \end{commentary} |