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author | Andrew Waterman <andrew@sifive.com> | 2017-04-17 22:53:20 -0700 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2017-04-17 23:09:30 -0700 |
commit | 6beb8b1676caa02caf655a827a8f95e177263e28 (patch) | |
tree | 46cbe09512501e2b479a12711c3544c89284d63a | |
parent | 8fd6ceb228d9a497cea697d4febf024a1efd4621 (diff) | |
download | riscv-isa-manual-6beb8b1676caa02caf655a827a8f95e177263e28.zip riscv-isa-manual-6beb8b1676caa02caf655a827a8f95e177263e28.tar.gz riscv-isa-manual-6beb8b1676caa02caf655a827a8f95e177263e28.tar.bz2 |
Recommend LR for sequentially consistent loads
-rw-r--r-- | src/a.tex | 12 |
1 files changed, 6 insertions, 6 deletions
@@ -343,12 +343,6 @@ implement {\em release}, both imply additional unnecessary ordering as compared to AMOs with the corresponding {\em aq} or {\em rl} bit set. \end{commentary} -AMOs can also be used to provide sequentially consistent loads and -stores. A sequentially consistent load can be implemented as an -AMOADD of x0 with both {\em aq} and {\em rl} set. A sequentially -consistent store can be implemented as an AMOSWAP that writes the old -value to x0 and has both {\em aq} and {\em rl} set. - An example code sequence for a critical section guarded by a test-and-set spinlock is shown in Figure~\ref{critical}. Note the first AMO is marked {\em aq} to order the lock acquisition before the @@ -383,3 +377,9 @@ lock value matches the swap value, to avoid dirtying a cache line held in a shared or exclusive clean state. The effect is similar to a test-and-test-and-set lock but with shorter code paths. \end{commentary} + +The instructions in the ``A'' extension can also be used to provide +sequentially consistent loads and stores. A sequentially consistent load can +be implemented as an LR with both {\em aq} and {\em rl} set. A sequentially +consistent store can be implemented as an AMOSWAP that writes the old value to +x0 and has both {\em aq} and {\em rl} set. |