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authorAndrew Waterman <andrew@sifive.com>2017-05-05 15:39:01 -0700
committerAndrew Waterman <andrew@sifive.com>2017-05-05 15:39:01 -0700
commit326bec83de23f4d2daf24cfed6b5251748cad632 (patch)
tree662478bcf952f9ad9d18ce900147d3e476b54939
parent5a32fe87820f2f0f7ffab16a4a33906e78e26abb (diff)
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Remove option to hardwire UXL/SXL to 0
-rw-r--r--src/machine.tex20
-rw-r--r--src/supervisor.tex11
2 files changed, 17 insertions, 14 deletions
diff --git a/src/machine.tex b/src/machine.tex
index f04ff68..0a6f37a 100644
--- a/src/machine.tex
+++ b/src/machine.tex
@@ -582,21 +582,21 @@ For RV64 and RV128 systems, the SXL and UXL fields are \warl\ fields
that control the value of XLEN for S-mode and U-mode,
respectively. The encoding of these fields is the same as the MXL
field of {\tt misa}, shown in Table~\ref{misabase}. The effective
-XLEN in S-mode and U-mode are termed {\em S-XLEN} and {\em U-XLEN}
+XLEN in S-mode and U-mode are termed {\em S-XLEN} and {\em U-XLEN},
respectively.
-RV32 systems always have SXL and UXL fields hardwired to zero with
+For RV32 systems, the SXL and UXL fields do not exist, and
S-XLEN~=~32 and U-XLEN~=~32.
-If S-mode is not supported then SXL is hardwired to zero. If S-mode
-is supported but variable S-XLEN is not supported, then SXL is
-hardwired to zero and S-XLEN~=~M-XLEN.
+For RV64 and RV128 systems, if S-mode is not supported, then SXL is hardwired
+to zero. Otherwise, it is a \warl\ field that encodes the current value of
+S-XLEN. In particular, the implementation may hardwire SXL so that
+S-XLEN~=~M-XLEN.
-If U-mode is not supported, then UXL is hardwired to zero. If
-variable U-XLEN is not supported, then UXL is hardwired to zero. If
-U-mode and S-mode are supported but variable UXL is not supported,
-then U-XLEN~=~S-XLEN. If U-mode is supported and S-mode is not
-supported and variable UXL is not supported, U-XLEN~=~M-XLEN.
+For RV64 and RV128 systems, if U-mode is not supported, then UXL is hardwired
+to zero. Otherwise, it is a \warl\ field that encodes the current value of
+U-XLEN. In particular, the implementation may hardwire UXL so that
+U-XLEN~=~M-XLEN.
Whenever XLEN in any mode is set to a value less than the widest
supported XLEN, all operations must ignore source operand register
diff --git a/src/supervisor.tex b/src/supervisor.tex
index 2db7c61..9aa0cdb 100644
--- a/src/supervisor.tex
+++ b/src/supervisor.tex
@@ -191,10 +191,13 @@ sstatus} is equivalent to reading or writing the homonymous field in
The UXL field controls the value of XLEN for U-mode, termed {\em U-XLEN},
which may differ from the value of XLEN for S-mode, termed {\em S-XLEN}. The
encoding of UXL is the same as that of the MXL field of {\tt misa}, shown in
-Table~\ref{misabase}. This field only exists for RV64 and RV128; RV32
-machines always use RV32 for U-mode. UXL is a \warl\ field, and an
-implementation may hard-wire UXL to zero, in which case U-XLEN~=~S-XLEN. If
-U-XLEN~$\ne$~S-XLEN, instructions executed in the narrower mode must ignore
+Table~\ref{misabase}.
+
+For RV32 systems, the UXL field does not exist, and U-XLEN~=~32. For RV64 and
+RV128 systems, it is a \warl\ field that encodes the current value of U-XLEN.
+In particular, the implementation may hardwire UXL so that U-XLEN~=~S-XLEN.
+
+If U-XLEN~$\ne$~S-XLEN, instructions executed in the narrower mode must ignore
source register operand bits above the configured XLEN, and must sign-extend
results to fill the widest supported XLEN in the destination register.