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| author | Krste Asanovic <krste@eecs.berkeley.edu> | 2017-03-20 09:59:59 -0700 |
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| committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2017-03-20 09:59:59 -0700 |
| commit | 147e006f904fa20b524010bf77b003ffb87343c4 (patch) | |
| tree | edda53e734d7a4f2e42cee8a2c37ab607393584b | |
| parent | 27748b3b8ba7e80548d6f9efae2479ec78c04efd (diff) | |
| download | riscv-isa-manual-147e006f904fa20b524010bf77b003ffb87343c4.zip riscv-isa-manual-147e006f904fa20b524010bf77b003ffb87343c4.tar.gz riscv-isa-manual-147e006f904fa20b524010bf77b003ffb87343c4.tar.bz2 | |
Clarified that RISC-V uses two's-complement arithmetic for signed integer values.
| -rw-r--r-- | src/intro.tex | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/intro.tex b/src/intro.tex index f10f975..00c3bef 100644 --- a/src/intro.tex +++ b/src/intro.tex @@ -227,7 +227,9 @@ of RV32I and RV64I for user programs. Chapter~\ref{rv32e} describes the RV32E subset variant of the RV32I base instruction set, which has been added to support small microcontrollers. Chapter~\ref{rv128} describes a future RV128I variant of the base integer instruction set -supporting a flat 128-bit user address space. +supporting a flat 128-bit user address space. The base integer +instruction sets use a two's-complement representation for signed +integer values. \begin{commentary} Although 64-bit address spaces are a requirement for larger systems, |