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| author | Kersten Richter <kersten@riscv.org> | 2024-04-18 07:24:58 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-04-18 07:24:58 -0500 |
| commit | c0091849d8ba44b87d8230af53b21284b7196f9d (patch) | |
| tree | 45328bd6334d62ea8d696481ca8ec0813431f2d0 | |
| parent | aa4a25cf6831cc962dbc72587a1804aaf8290aae (diff) | |
| download | riscv-isa-manual-c0091849d8ba44b87d8230af53b21284b7196f9d.zip riscv-isa-manual-c0091849d8ba44b87d8230af53b21284b7196f9d.tar.gz riscv-isa-manual-c0091849d8ba44b87d8230af53b21284b7196f9d.tar.bz2 | |
Update src/sstc.adoc
Signed-off-by: Kersten Richter <kersten@riscv.org>
| -rw-r--r-- | src/sstc.adoc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/sstc.adoc b/src/sstc.adoc index 4421b22..3163243 100644 --- a/src/sstc.adoc +++ b/src/sstc.adoc @@ -149,7 +149,7 @@ registers as follows: Bits hip.VSTIP and hie.VSTIE are the interrupt-pending and interrupt-enable bits for VS-level timer interrupts. VSTIP is read-only in hip, and is the logical-OR of hvip.VSTIP and the timer interrupt signal resulting from -vstimecmp (if `vstimecmp` is implemented). The hip.VSTIP bit, in response to +`vstimecmp` (if `vstimecmp` is implemented). The `hip`.VSTIP bit, in response to timer interrupts generated by `vstimecmp`, is set and cleared by writing `vstimecmp` with a value that respectively is less than or equal to, or greater than, the current (`time` + `htimedelta`) value. The hip.VSTIP bit remains defined |