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| author | Andrew Waterman <andrew@sifive.com> | 2019-04-18 16:58:22 -0500 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-04-18 16:58:22 -0500 |
| commit | 74ad5311d7263a915574dfa04ab28dffab34afcd (patch) | |
| tree | 8151c786cf3342dc994e6b8575b8e29388486a93 | |
| parent | e3ecc6c00dcfeafb526be5603825259706afc5b3 (diff) | |
| download | riscv-isa-manual-74ad5311d7263a915574dfa04ab28dffab34afcd.zip riscv-isa-manual-74ad5311d7263a915574dfa04ab28dffab34afcd.tar.gz riscv-isa-manual-74ad5311d7263a915574dfa04ab28dffab34afcd.tar.bz2 | |
Fix erroneous caption
Resolves #371
| -rw-r--r-- | src/assembly.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/assembly.tex b/src/assembly.tex index b535e16..862ae01 100644 --- a/src/assembly.tex +++ b/src/assembly.tex @@ -162,6 +162,6 @@ pseudoinstruction & Base Instruction & Meaning \\ \hline \end{tabular} \end{center} \end{small} -\caption{Pseudoinstructions for accessing control and status registers.} +\caption{RISC-V pseudoinstructions.} \label{csr-pseudos} \end{table} |