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author | Andrew Waterman <andrew@sifive.com> | 2024-02-27 18:43:16 -0800 |
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committer | GitHub <noreply@github.com> | 2024-02-27 18:43:16 -0800 |
commit | 187bba0fc755c03b8d60040ac9507504adb63afe (patch) | |
tree | 6731840dbcf7b4de120ca2062d2ca0a6d5331cba | |
parent | 09c16b84dbb0b46ca7f3163d650bbcf7270b794f (diff) | |
parent | c9d396762a62db3c481c1bbae0e605bdfae193e5 (diff) | |
download | riscv-isa-manual-187bba0fc755c03b8d60040ac9507504adb63afe.zip riscv-isa-manual-187bba0fc755c03b8d60040ac9507504adb63afe.tar.gz riscv-isa-manual-187bba0fc755c03b8d60040ac9507504adb63afe.tar.bz2 |
Merge pull request #1239 from sorear/sc-svadu
Explicitly allow side effects for a failed SC
-rw-r--r-- | src/a-st-ext.adoc | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/a-st-ext.adoc b/src/a-st-ext.adoc index 396d135..9fae7ab 100644 --- a/src/a-st-ext.adoc +++ b/src/a-st-ext.adoc @@ -62,10 +62,11 @@ if the reservation is still valid and the reservation set contains the bytes being written. If the SC.W succeeds, the instruction writes the word in _rs2_ to memory, and it writes zero to _rd_. If the SC.W fails, the instruction does not write to memory, and it writes a nonzero value -to _rd_. Regardless of success or failure, executing an SC.W instruction -invalidates any reservation held by this hart. LR.D and SC.D act -analogously on doublewords and are only available on RV64. For RV64, -LR.W and SC.W sign-extend the value placed in _rd_. +to _rd_. For the purposes of memory protection, a failed SC.W may be +treated like a store. Regardless of success or failure, executing an +SC.W instruction invalidates any reservation held by this hart. LR.D and +SC.D act analogously on doublewords and are only available on RV64. For +RV64, LR.W and SC.W sign-extend the value placed in _rd_. [NOTE] ==== |