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author | ved-rivos <91900059+ved-rivos@users.noreply.github.com> | 2023-06-23 17:29:44 -0500 |
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committer | GitHub <noreply@github.com> | 2023-06-23 15:29:44 -0700 |
commit | c677ca693798437a23dc449a29658de38f4db9bd (patch) | |
tree | cbf4ef430465882f9d7ceb2bda71b05a6c6e7139 | |
parent | 05da91b0d0533ab72d6de658e516bf0c9fb8dc9b (diff) | |
download | riscv-isa-manual-c677ca693798437a23dc449a29658de38f4db9bd.zip riscv-isa-manual-c677ca693798437a23dc449a29658de38f4db9bd.tar.gz riscv-isa-manual-c677ca693798437a23dc449a29658de38f4db9bd.tar.bz2 |
64-bit word => doubleword; 32-bit word => word (#1052)
-rw-r--r-- | src/a-st-ext.adoc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/a-st-ext.adoc b/src/a-st-ext.adoc index 877c275..c402585 100644 --- a/src/a-st-ext.adoc +++ b/src/a-st-ext.adoc @@ -115,7 +115,7 @@ defined in future versions or extensions to the ISA. For LR and SC, the A extension requires that the address held in _rs1_ be naturally aligned to the size of the operand (i.e., eight-byte -aligned for 64-bit words and four-byte aligned for 32-bit words). If the +aligned for _doublewords_ and four-byte aligned for _words_). If the address is not naturally aligned, an address-misaligned exception or an access-fault exception will be generated. The access-fault exception can be generated for a memory access that would otherwise be able to @@ -358,13 +358,13 @@ R-type instruction format. These AMO instructions atomically load a data value from the address in _rs1_, place the value into register _rd_, apply a binary operator to the loaded value and the original value in _rs2_, then store the result back to the original address in _rs1_. AMOs -can either operate on 64-bit (RV64 only) or 32-bit words in memory. For +can either operate on _doublewords_ (RV64 only) or _words_ in memory. For RV64, 32-bit AMOs always sign-extend the value placed in _rd_, and ignore the upper 32 bits of the original value of _rs2_. For AMOs, the A extension requires that the address held in _rs1_ be naturally aligned to the size of the operand (i.e., eight-byte aligned -for 64-bit words and four-byte aligned for 32-bit words). If the address +for _doublewords_ and four-byte aligned for _words_). If the address is not naturally aligned, an address-misaligned exception or an access-fault exception will be generated. The access-fault exception can be generated for a memory access that would otherwise be able to |