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| author | Andrew Waterman <andrew@sifive.com> | 2023-07-21 15:48:57 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-07-21 15:48:57 -0700 |
| commit | 1e05b637d810840a89bb4fddbd0592401b4cd483 (patch) | |
| tree | 90e52b1dab9499a3c01eb78d6e2e80f4c8714fe7 | |
| parent | 2d166dc55a7355077258caad878df1c4359ccfec (diff) | |
| parent | 001f73a357c3301bbc169ed89a8f69d3bb198255 (diff) | |
| download | riscv-isa-manual-1e05b637d810840a89bb4fddbd0592401b4cd483.zip riscv-isa-manual-1e05b637d810840a89bb4fddbd0592401b4cd483.tar.gz riscv-isa-manual-1e05b637d810840a89bb4fddbd0592401b4cd483.tar.bz2 | |
Merge pull request #1073 from charlie-rivos/correct_amo_register_name
Correct Name of LR/SC Instructions rl bit
| -rw-r--r-- | src/images/wavedrom/load-reserve-st-conditional.adoc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/images/wavedrom/load-reserve-st-conditional.adoc b/src/images/wavedrom/load-reserve-st-conditional.adoc index 67ce56a..355342c 100644 --- a/src/images/wavedrom/load-reserve-st-conditional.adoc +++ b/src/images/wavedrom/load-reserve-st-conditional.adoc @@ -10,7 +10,7 @@ {bits: 3, name: 'funct3', attr: ['3', 'width', 'width'], type: 8}, {bits: 5, name: 'rs1', attr: ['5', 'addr', 'addr'], type: 4}, {bits: 5, name: 'rs2', attr: ['5', '0', 'src'], type: 4}, - {bits: 1, name: 'r1', attr: ['1', 'ring', 'ring'], type: 8}, + {bits: 1, name: 'rl', attr: ['1', 'ring', 'ring'], type: 8}, {bits: 1, name: 'aq', attr: ['1', 'orde', 'orde'], type: 8}, {bits: 5, name: 'funct5', attr: ['5', 'LR.W/D', 'SC.W/D'], type: 8}, ]} |