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| author | Charlie Jenkins <charlie@rivosinc.com> | 2023-07-21 11:47:09 -0700 |
|---|---|---|
| committer | Charlie Jenkins <charlie@rivosinc.com> | 2023-07-21 11:47:09 -0700 |
| commit | 151cb119a8d6e9c35218269f7f979ad11edca2ad (patch) | |
| tree | dcc9aeb8baa3b01d2f555a134b6b29438243101d | |
| parent | 2d166dc55a7355077258caad878df1c4359ccfec (diff) | |
| download | riscv-isa-manual-151cb119a8d6e9c35218269f7f979ad11edca2ad.zip riscv-isa-manual-151cb119a8d6e9c35218269f7f979ad11edca2ad.tar.gz riscv-isa-manual-151cb119a8d6e9c35218269f7f979ad11edca2ad.tar.bz2 | |
Make "Integer Register-Immediate Operations" Consistent
Properly align the ADDI16SP immediate in wavedrom. Remove the bit
brackets from the immediates because the instructions do not uniformly
follow the same immediate format.
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
| -rw-r--r-- | src/images/wavedrom/c-int-reg-immed.adoc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/images/wavedrom/c-int-reg-immed.adoc b/src/images/wavedrom/c-int-reg-immed.adoc index a804555..b72b5a1 100644 --- a/src/images/wavedrom/c-int-reg-immed.adoc +++ b/src/images/wavedrom/c-int-reg-immed.adoc @@ -4,9 +4,9 @@ .... {reg: [ {bits: 2, name: 'op', type: 3, attr: ['2','C1', 'C1', 'C1']}, - {bits: 5, name: 'imm[4:0]', type: 1, attr: ['5','imm[4:0]', 'imm[4:0], imm[4|6|8:7|5]']}, + {bits: 5, name: 'imm', type: 1, attr: ['5','imm[4:0]', 'imm[4:0]', 'imm[4|6|8:7|5]']}, {bits: 5, name: 'rd/rs1', type: 5, attr: ['5','dest≠0', 'dest≠0', '2']}, - {bits: 1, name: 'imm[5]', type: 5, attr: ['1','imm[5]', 'imm[5]', 'imm[9]']}, + {bits: 1, name: 'imm', type: 5, attr: ['1','imm[5]', 'imm[5]', 'imm[9]']}, {bits: 3, name: 'funct3', type: 5, attr: ['3','C.ADDI', 'C.ADDIW', 'C.ADDI16SP']}, ], config: {bits: 16}} .... |