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author | Andrew Waterman <andrew@sifive.com> | 2023-07-21 16:03:49 -0700 |
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committer | GitHub <noreply@github.com> | 2023-07-21 16:03:49 -0700 |
commit | 0d7621d95668aee8adaa2eb87981c11f49f1c637 (patch) | |
tree | 65bce1757c9684a77371ef8d4d574aeeea8700e2 | |
parent | 223202291850575acd2d0f982a0222536acb2a37 (diff) | |
download | riscv-isa-manual-0d7621d95668aee8adaa2eb87981c11f49f1c637.zip riscv-isa-manual-0d7621d95668aee8adaa2eb87981c11f49f1c637.tar.gz riscv-isa-manual-0d7621d95668aee8adaa2eb87981c11f49f1c637.tar.bz2 |
priv-1.13: clarify that MXLEN >= SXLEN; constrain SXLEN >= UXLEN (#1028)
* Clarify RV32/RV64 vs. MXLEN=32/MXLEN=64
As a consequence, this clarifies that MXLEN >= SXLEN.
* Preclude UXLEN > SXLEN
-rw-r--r-- | src/machine.adoc | 9 | ||||
-rw-r--r-- | src/priv-preface.adoc | 2 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/machine.adoc b/src/machine.adoc index 97fbecc..75adeb0 100644 --- a/src/machine.adoc +++ b/src/machine.adoc @@ -461,19 +461,22 @@ fields is the same as the MXL field of `misa`, shown in <<misabase>>. The effective XLEN in S-mode and U-mode are termed _SXLEN_ and _UXLEN_, respectively. -For RV32 systems, the SXL and UXL fields do not exist, and SXLEN=32 and +When MXLEN=32, the SXL and UXL fields do not exist, and SXLEN=32 and UXLEN=32. -For RV64 systems, if S-mode is not supported, then SXL is read-only +When MXLEN=64, if S-mode is not supported, then SXL is read-only zero. Otherwise, it is a *WARL* field that encodes the current value of SXLEN. In particular, an implementation may make SXL be a read-only field whose value always ensures that SXLEN=MXLEN. -For RV64 systems, if U-mode is not supported, then UXL is read-only +When MXLEN=64, if U-mode is not supported, then UXL is read-only zero. Otherwise, it is a *WARL* field that encodes the current value of UXLEN. In particular, an implementation may make UXL be a read-only field whose value always ensures that UXLEN=MXLEN or UXLEN=SXLEN. +If S-mode is implemented, the set of legal values that the UXL field may +assume excludes those that would cause UXLEN to be greater than SXLEN. + Whenever XLEN in any mode is set to a value less than the widest supported XLEN, all operations must ignore source operand register bits above the configured XLEN, and must sign-extend results to fill the diff --git a/src/priv-preface.adoc b/src/priv-preface.adoc index e62d59f..2dcfe79 100644 --- a/src/priv-preface.adoc +++ b/src/priv-preface.adoc @@ -37,6 +37,8 @@ version 1.12: * Defined the `misa`.V field to reflect that the V extension has been implemented. * Clarified semantics of explicit accesses to CSRs wider than XLEN bits. +* Clarified that MXLEN≥SXLEN, and added the constraint that +SXLEN≥UXLEN. *_Preface to Version 20211203_* |