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author | Kersten Richter <kersten@riscv.org> | 2024-03-22 11:32:01 -0500 |
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committer | GitHub <noreply@github.com> | 2024-03-22 11:32:01 -0500 |
commit | e97303e305d901099727997e43af5be3e060a8b7 (patch) | |
tree | 8fb70d6a2147c97a88ee30a100f040fd21d77cc2 | |
parent | 637df22dfd0f82fe6e36dd77ed1cc4dcdc086dd7 (diff) | |
download | riscv-isa-manual-e97303e305d901099727997e43af5be3e060a8b7.zip riscv-isa-manual-e97303e305d901099727997e43af5be3e060a8b7.tar.gz riscv-isa-manual-e97303e305d901099727997e43af5be3e060a8b7.tar.bz2 |
Update machine.adoc
Moving change from latex to adoc.
Signed-off-by: Kersten Richter <kersten@riscv.org>
-rw-r--r-- | src/machine.adoc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/machine.adoc b/src/machine.adoc index 640a794..51b78eb 100644 --- a/src/machine.adoc +++ b/src/machine.adoc @@ -2722,7 +2722,7 @@ same interconnect path and the path does not reorder requests. Coherence is a property defined for a single physical address, and indicates that writes to that address by one agent will eventually be -made visible to other agents in the system. Coherence is not to be +made visible to other coherent agents in the system. Coherence is not to be confused with the memory consistency model of a system, which defines what values a memory read can return given the previous history of reads and writes to the entire memory system. In RISC-V platforms, the use of |