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| author | Andrew Waterman <andrew@sifive.com> | 2024-03-25 13:29:26 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-25 13:29:26 -0700 |
| commit | 334b520f543246a7527542d4e62221d202d6aa19 (patch) | |
| tree | f926f0dd882b0fcecceef1c08cd78f8d8d3939f9 | |
| parent | d69d777855ac3405c3d25cebc75ff12f379cbd81 (diff) | |
| parent | cdb25859bcce5a6edbdc34914c1f86f079b3fddd (diff) | |
| download | riscv-isa-manual-334b520f543246a7527542d4e62221d202d6aa19.zip riscv-isa-manual-334b520f543246a7527542d4e62221d202d6aa19.tar.gz riscv-isa-manual-334b520f543246a7527542d4e62221d202d6aa19.tar.bz2 | |
Merge pull request #1287 from ved-rivos/B-ext
Integrate B standard extension text
| -rw-r--r-- | src/b-st-ext.adoc | 5 | ||||
| -rw-r--r-- | src/machine.adoc | 6 | ||||
| -rw-r--r-- | src/naming.adoc | 2 |
3 files changed, 11 insertions, 2 deletions
diff --git a/src/b-st-ext.adoc b/src/b-st-ext.adoc index 52beb61..81ec997 100644 --- a/src/b-st-ext.adoc +++ b/src/b-st-ext.adoc @@ -1,6 +1,9 @@ [[bits]] == "B" Standard Extension for Bit Manipulation, Version 1.0.0 +The B standard extension comprises instructions provided by the Zba, Zbb, and +Zbs extensions. + [[preface]] === Bit-manipulation a, b, c and s extensions grouped for public review and ratification @@ -3898,4 +3901,4 @@ strcmp: ret .size strcmp, .-strcmp ---
\ No newline at end of file +-- diff --git a/src/machine.adoc b/src/machine.adoc index 51b78eb..75661e7 100644 --- a/src/machine.adoc +++ b/src/machine.adoc @@ -156,7 +156,7 @@ X + Y + Z |Atomic extension + -_Reserved_ + +B extension + Compressed extension + Double-precision floating-point extension + RV32E/64E base ISA + @@ -192,6 +192,10 @@ supervisor modes respectively. The "X" bit will be set if there are any non-standard extensions. +When "B" bit is 1, the implementation supports the instructions provided by the +Zba, Zbb, and Zbs extensions. When "B" bit is 0, it indicates that the +implementation may not support one or more of the Zba, Zbb, or Zbs extensions. + [NOTE] ==== The `misa` CSR exposes a rudimentary catalog of CPU features to diff --git a/src/naming.adoc b/src/naming.adoc index f597733..63c45d3 100644 --- a/src/naming.adoc +++ b/src/naming.adoc @@ -182,6 +182,8 @@ e.g., RV32IMACV is legal, whereas RV32IMAVC is not. |16-bit Compressed Instructions |C | +|B Extension |B | + |Packed-SIMD Extensions |P | |Vector Extension |V |D |