diff options
| author | wmat <wmat@riscv.org> | 2024-03-26 08:55:45 -0400 |
|---|---|---|
| committer | wmat <wmat@riscv.org> | 2024-03-26 08:55:45 -0400 |
| commit | 31d451b2bd14cccb1f603846b5fb465671b0dc1d (patch) | |
| tree | af3a22ee594282f85eed0e8b1c42788c988062e3 | |
| parent | b3ee62f3e9c15ff50df8438c43e0c474f6d22b8e (diff) | |
| download | riscv-isa-manual-31d451b2bd14cccb1f603846b5fb465671b0dc1d.zip riscv-isa-manual-31d451b2bd14cccb1f603846b5fb465671b0dc1d.tar.gz riscv-isa-manual-31d451b2bd14cccb1f603846b5fb465671b0dc1d.tar.bz2 | |
Set explicit anchor on table.
Set an explicit anchor on the Indirect HPM State Mappings table and update link to it further down
in the document.
| -rw-r--r-- | src/smcdeleg.adoc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/smcdeleg.adoc b/src/smcdeleg.adoc index ba890f5..fd67d82 100644 --- a/src/smcdeleg.adoc +++ b/src/smcdeleg.adoc @@ -44,6 +44,7 @@ with counter _i_ can be read or written via `sireg*`, while `siselect` holds the table below. .Indirect HPM State Mappings +[#indirect-hpm-state-mappings] [width="100%",cols="21%,20%,21%,18%,20%",options="header",] |=== |*`siselect` value* |*`sireg*` |*`sireg4`* |*`sireg2`* |*`sireg5`* @@ -90,7 +91,7 @@ NOTE: _The memory-mapped `mtime` register is not a performance monitoring counter to be managed by supervisor software, hence the special treatment of `siselect` value 0x41 described above._ -For each `siselect` and `sireg*` combination defined in <<Indirect HPM State Mappings>>, the table +For each `siselect` and `sireg*` combination defined in <<indirect-hpm-state-mappings>>, the table further indicates the extensions upon which the underlying counter state depends. If any extension upon which the underlying state depends is not implemented, an attempt from M or S mode to access the given state |