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| author | wmat <wmat@riscv.org> | 2024-03-26 16:20:00 -0400 |
|---|---|---|
| committer | wmat <wmat@riscv.org> | 2024-03-26 16:20:00 -0400 |
| commit | 217ebabf02fb01e4ac6273ebe904f91a6bf297eb (patch) | |
| tree | d8d881589b925a429aa0287d56935d513e4a9235 | |
| parent | b3ee62f3e9c15ff50df8438c43e0c474f6d22b8e (diff) | |
| download | riscv-isa-manual-217ebabf02fb01e4ac6273ebe904f91a6bf297eb.zip riscv-isa-manual-217ebabf02fb01e4ac6273ebe904f91a6bf297eb.tar.gz riscv-isa-manual-217ebabf02fb01e4ac6273ebe904f91a6bf297eb.tar.bz2 | |
Fix reference to menvcfgreg
The was a missing reference to Figure 16.
| -rw-r--r-- | src/machine.adoc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/machine.adoc b/src/machine.adoc index 21e4083..b92781a 100644 --- a/src/machine.adoc +++ b/src/machine.adoc @@ -1996,10 +1996,11 @@ M-mode software towards the beginning of the boot process. ==== Machine Environment Configuration Register (`menvcfg`) The `menvcfg` CSR is a 64-bit read/write register, formatted -as shown in [[menvcfg]], that controls +as shown in <<menvcfgreg>>, that controls certain characteristics of the execution environment for modes less privileged than M. +[#menvcfgreg] .Machine environment configuration register (`menvcfg`). include::images/bytefield/menvcfgreg.adoc[] |