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author | Christopher Celio <celio@eecs.berkeley.edu> | 2018-10-04 18:51:30 -0700 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2018-10-04 18:51:30 -0700 |
commit | f0d5969f9f9ba4ac2420f7b392d7ad04ecd2528f (patch) | |
tree | 53afb54e730dd0ccfecdc50ef1b607618afb67ef | |
parent | 4bf712347e6fede7c9119faed2d66b9bd9741a42 (diff) | |
download | riscv-isa-manual-f0d5969f9f9ba4ac2420f7b392d7ad04ecd2528f.zip riscv-isa-manual-f0d5969f9f9ba4ac2420f7b392d7ad04ecd2528f.tar.gz riscv-isa-manual-f0d5969f9f9ba4ac2420f7b392d7ad04ecd2528f.tar.bz2 |
Update marchid.md. (#235)
Add BOOM.
-rw-r--r-- | marchid.md | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -19,4 +19,5 @@ ID. Project Name | Maintainers | Point of Contact | Architecture ID | Project URL -------------|-------------------------------|---------------------------------------------------------|-----------------|--------------------------------------------------- Rocket | SiFive, UC Berkeley | [Andrew Waterman](mailto:andrew@sifive.com), SiFive | 1 | https://github.com/freechipsproject/rocket-chip +BOOM | UC Berkeley | [Christopher Celio](mailto:celio@berkeley.edu) | 2 | https://github.com/ucb-bar/riscv-boom Spike | SiFive, UC Berkeley | [Andrew Waterman](mailto:andrew@sifive.com), SiFive | 5 | https://github.com/riscv/riscv-isa-sim |