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| author | Andrew Waterman <andrew@sifive.com> | 2018-08-25 05:30:47 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2018-08-25 05:30:47 -0700 |
| commit | d0b01fde5f10730ce898124633ac898850b31323 (patch) | |
| tree | 0e686c10798be975b3f03db38670331ce3e512fa | |
| parent | c011be7529fd98b9a31c72e7abc8566e02a71912 (diff) | |
| download | riscv-isa-manual-d0b01fde5f10730ce898124633ac898850b31323.zip riscv-isa-manual-d0b01fde5f10730ce898124633ac898850b31323.tar.gz riscv-isa-manual-d0b01fde5f10730ce898124633ac898850b31323.tar.bz2 | |
Clarify that FENCE opcode bits aren't required to be 0
(They're reserved for future use)
| -rw-r--r-- | src/instr-table.tex | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/src/instr-table.tex b/src/instr-table.tex index fb312e3..bf2fb3e 100644 --- a/src/instr-table.tex +++ b/src/instr-table.tex @@ -433,20 +433,18 @@ \multicolumn{2}{|c|}{fm} & \multicolumn{3}{c|}{pred} & \multicolumn{1}{c|}{succ} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{000} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{rd} & \multicolumn{1}{c|}{0001111} & FENCE \\ \cline{2-11} & -\multicolumn{2}{|c|}{0000} & -\multicolumn{3}{c|}{0000} & -\multicolumn{1}{c|}{0000} & -\multicolumn{1}{c|}{00000} & +\multicolumn{6}{|c|}{imm[11:0]} & +\multicolumn{1}{c|}{rs1} & \multicolumn{1}{c|}{001} & -\multicolumn{1}{c|}{00000} & +\multicolumn{1}{c|}{rd} & \multicolumn{1}{c|}{0001111} & FENCE.I \\ \cline{2-11} |