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author | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-08-26 06:04:51 -0700 |
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committer | Krste Asanovic <krste@eecs.berkeley.edu> | 2018-08-26 06:04:51 -0700 |
commit | 9cf5c8e3eff9973bb97869419c4375fabd6e64b8 (patch) | |
tree | 4db0da7d535af7ee8d2414014e545e7030085784 | |
parent | 48df4e3688823c01dbca5e61b2f2e8cfb6ebd6d9 (diff) | |
download | riscv-isa-manual-9cf5c8e3eff9973bb97869419c4375fabd6e64b8.zip riscv-isa-manual-9cf5c8e3eff9973bb97869419c4375fabd6e64b8.tar.gz riscv-isa-manual-9cf5c8e3eff9973bb97869419c4375fabd6e64b8.tar.bz2 |
Updated several "user" references to "unprivileged".
-rw-r--r-- | src/extensions.tex | 2 | ||||
-rw-r--r-- | src/intro.tex | 2 | ||||
-rw-r--r-- | src/naming.tex | 4 | ||||
-rw-r--r-- | src/preface.tex | 13 | ||||
-rw-r--r-- | src/riscv-spec.tex | 4 |
5 files changed, 13 insertions, 12 deletions
diff --git a/src/extensions.tex b/src/extensions.tex index 4346422..2517165 100644 --- a/src/extensions.tex +++ b/src/extensions.tex @@ -15,7 +15,7 @@ instruction-set extensions. This chapter describes various ways in which the base RISC-V ISA can be extended, together with the scheme for managing instruction-set extensions developed by independent groups. This volume only deals -with the user-level ISA, although the same approach and terminology is +with the unprivileged ISA, although the same approach and terminology is used for supervisor-level extensions described in the second volume. \section{Extension Terminology} diff --git a/src/intro.tex b/src/intro.tex index 59f7087..461197f 100644 --- a/src/intro.tex +++ b/src/intro.tex @@ -255,7 +255,7 @@ practice, even with compatible encodings, due to the differences in software calling conventions and system-call interfaces. The RISC-V privileged architecture provides fields in {\tt - misa} to control the user ISA at each level to support emulating + misa} to control the unprivileged ISA at each level to support emulating different base ISAs on the same hardware. We note that newer SPARC and MIPS ISA revisions have deprecated support for running 32-bit code unchanged on 64-bit systems. diff --git a/src/naming.tex b/src/naming.tex index 2fac80a..2770239 100644 --- a/src/naming.tex +++ b/src/naming.tex @@ -111,7 +111,7 @@ Double-Precision Floating-Point & D \\ \hline General & G = IMAFD \\ \hline -\multicolumn{2}{|c|}{Standard User-Level Extensions}\\ +\multicolumn{2}{|c|}{Standard Unprivileged Extensions}\\ \hline Quad-Precision Floating-Point & Q \\ Decimal Floating-Point & L \\ @@ -124,7 +124,7 @@ Vector Extensions & V \\ User-Level Interrupts & N \\ \hline \hline -\multicolumn{2}{|c|}{Non-Standard User-Level Extensions}\\ +\multicolumn{2}{|c|}{Non-Standard Unprivileged Extensions}\\ \hline Non-standard extension ``abc'' & Xabc \\ \hline diff --git a/src/preface.tex b/src/preface.tex index a7e0111..e23852f 100644 --- a/src/preface.tex +++ b/src/preface.tex @@ -1,7 +1,7 @@ \chapter{Preface} This is {\bf a draft of} the next release of the document describing the RISC-V -user-level architecture, targeted for release \specrev. The document contains the following +unprivileged architecture, targeted for release \specrev. The document contains the following versions of the RISC-V ISA modules: \begin{table}[hbt] \centering @@ -56,11 +56,12 @@ The major changes in this version of the document include: reserved}, {\em custom}, {\em non-standard}, and {\em non-conforming}. \item Changed description of misaligned load and store behavior to - support change to be an unprivileged ISA manual versus a user ISA - manual. Now allow visible misaligned exceptions in execution - environment interfaces rather then just mandating invisible handling - of misaligned loads and stores in user mode. This behavior was - already needed for definition of classic privileged architecture. + match change that this is now an unprivileged ISA manual not a user + ISA manual. Now allows visible misaligned address traps in + execution environment interfaces rather then just mandating + invisible handling of misaligned loads and stores in user mode. + This behavior was already needed to support definition of the + classic privileged architecture. \item FENCE.TSO instruction extension added. \item Removed prohibitions on using RV32E with other extensions. \item Removed platform-specific mandates that certain encodings diff --git a/src/riscv-spec.tex b/src/riscv-spec.tex index 9cfba79..80cd067 100644 --- a/src/riscv-spec.tex +++ b/src/riscv-spec.tex @@ -55,8 +55,8 @@ Manual, Volume I: User-Level ISA, Document Version \specrev'', Editors Andrew Waterman and Krste Asanovi\'{c}, RISC-V Foundation, May 2017. -\markboth{Volume I: RISC-V User-Level ISA V\specrev} -{Volume I: RISC-V User-Level ISA V\specrev} +\markboth{Volume I: RISC-V Unprivileged ISA V\specrev} +{Volume I: RISC-V Unprivileged ISA V\specrev} \thispagestyle{empty} \frontmatter |