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authorDaniel Lustig <dlustig@nvidia.com>2021-04-23 08:01:35 -0400
committerDaniel Lustig <dlustig@nvidia.com>2021-04-23 08:05:42 -0400
commite0ccad5acb38bf418a9a3dd454a956ddfc2a442e (patch)
treef0f41ff96385a353b6eecf7196897752ba34723e
parent19ab9f45c06dfb0fd33262dde696d682d1fdf0cf (diff)
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Resolve inconsistency regarding C and N bits
Thanks to Phil McCoy for pointing this out
-rw-r--r--src/supervisor.tex25
1 files changed, 12 insertions, 13 deletions
diff --git a/src/supervisor.tex b/src/supervisor.tex
index 4a7b5ba..0f5c8bb 100644
--- a/src/supervisor.tex
+++ b/src/supervisor.tex
@@ -1814,27 +1814,26 @@ have the same meaning as for Sv32.
\begin{table}[h]
\begin{center}
-\begin{tabular}{|c|c||l|}
+\begin{tabular}{|c||l|}
\hline
-C & N & Description \\
+C & Description \\
\hline
-0 & 0 & The PTE follows standard address-translation rules \\
-0 & 1 & The PTE follows the rules specified in the Svnapot extension \\
-1 & 0 & {\em Designated for custom use} \\
-1 & 1 & {\em Reserved for standard use} \\
+0 & The PTE follows standard address-translation rules \\
+1 & {\em Designated for custom use} \\
\hline
\end{tabular}
\end{center}
-\caption{Meaning of PTE C and N bits in Sv39.}
+\caption{Meaning of PTE C bit in Sv39.}
\label{tab:pte_cv_bits}
\end{table}
-The C and N bits are defined as shown in Table~\ref{tab:pte_cv_bits}. The C
-bit is used to indicate that a PTE uses a custom implementation-specific
-encoding in the remaining bits other than the V bit. The N bit indicates that
-the page represents a naturally-aligned power-of-two range of contiguous
-translations, as defined in the Svnapot extension in Chapter~\ref{svnapot}.
-Setting the C and N bits simultaneously is reserved for future standard use.
+As shown in Table~\ref{tab:pte_cv_bits}, the C bit is used to indicate that a
+PTE uses a custom implementation-specific encoding in the remaining bits other
+than the V bit.
+
+If the C bit is not set, the N bit indicates that the page represents a
+naturally-aligned power-of-two range of contiguous translations, as defined in
+the Svnapot extension in Chapter~\ref{svnapot}.
Bits 61--54 are reserved
for future standard use and must be zeroed by software for forward compatibility.