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author | Andrew Waterman <andrew@sifive.com> | 2021-05-17 01:29:08 -0700 |
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committer | Andrew Waterman <andrew@sifive.com> | 2021-05-17 01:29:08 -0700 |
commit | a4eba93a0bfd6a39c9c7e4ae6353daa616bcdcc8 (patch) | |
tree | 2965ef55d24b9d3cf03ea73b1e6f5acfb1a0db67 | |
parent | d8e5f7d6f950359f35e2da52884730f2374f8900 (diff) | |
download | riscv-isa-manual-a4eba93a0bfd6a39c9c7e4ae6353daa616bcdcc8.zip riscv-isa-manual-a4eba93a0bfd6a39c9c7e4ae6353daa616bcdcc8.tar.gz riscv-isa-manual-a4eba93a0bfd6a39c9c7e4ae6353daa616bcdcc8.tar.bz2 |
Incorporate Krste's feedback
-rw-r--r-- | src/m.tex | 8 |
1 files changed, 0 insertions, 8 deletions
@@ -176,14 +176,6 @@ namely: MUL, MULH, MULHU, MULHSU, and (for RV64 only) MULW. The encodings are identical to those of the corresponding M-extension instructions. \begin{commentary} -The Zmmul extension implicitly allows the DIV* and REM* opcodes to cause -illegal-instruction exceptions (e.g. if a platform requires DIV*/REM* -emulation) or be used for non-conforming extensions. -It cannot coexist with the M extension, but otherwise has -no conflicts with or dependencies on other extensions. -\end{commentary} - -\begin{commentary} The Zmmul extension enables low-cost implementations that require multiplication operations but not division. For many microcontroller applications, division operations are too |