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author | Kersten Richter <kersten@riscv.org> | 2024-06-11 15:25:19 -0500 |
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committer | GitHub <noreply@github.com> | 2024-06-11 15:25:19 -0500 |
commit | c765bebc120c6a5f363734d7fcef7a520eee106c (patch) | |
tree | 61e8f56cd8751f2871db381374a8902966650378 | |
parent | 24f7075f45b9a99c877bc59235a4a316294f8672 (diff) | |
download | riscv-isa-manual-c765bebc120c6a5f363734d7fcef7a520eee106c.zip riscv-isa-manual-c765bebc120c6a5f363734d7fcef7a520eee106c.tar.gz riscv-isa-manual-c765bebc120c6a5f363734d7fcef7a520eee106c.tar.bz2 |
Update b-st-ext.adoc
dupe id
Signed-off-by: Kersten Richter <kersten@riscv.org>
-rw-r--r-- | src/b-st-ext.adoc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/b-st-ext.adoc b/src/b-st-ext.adoc index 4f45af1..0dfb273 100644 --- a/src/b-st-ext.adoc +++ b/src/b-st-ext.adoc @@ -29,7 +29,7 @@ Bitmanip instructions with the suffix _.b_, _.h_ and _.w_ only look at the least === Pseudocode for instruction semantics -The semantics of each instruction in <<#insns>> is expressed in a SAIL-like syntax. +The semantics of each instruction in <<#insns-b>> is expressed in a SAIL-like syntax. === Extensions @@ -996,7 +996,7 @@ latency does not depend on the (secret) data being operated on. <<< -[#insns,reftext="Instructions (in alphabetical order)"] +[#insns-b,reftext="Instructions (in alphabetical order)"] === Instructions (in alphabetical order) [#insns-add_uw,reftext=Add unsigned word] |