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| author | Andrew Waterman <andrew@sifive.com> | 2024-06-10 14:39:52 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2024-06-10 14:39:52 -0700 |
| commit | ad0a305aea6aebda7e26e857886143bb38928f4c (patch) | |
| tree | 5738c0aed8d6a63582b13b5d9035305ee4e0c1a9 | |
| parent | 84fe233731dab8326b29c76af3141c40fb772bdc (diff) | |
| download | riscv-isa-manual-ad0a305aea6aebda7e26e857886143bb38928f4c.zip riscv-isa-manual-ad0a305aea6aebda7e26e857886143bb38928f4c.tar.gz riscv-isa-manual-ad0a305aea6aebda7e26e857886143bb38928f4c.tar.bz2 | |
add misa.B to preface
| -rw-r--r-- | src/priv-preface.adoc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/priv-preface.adoc b/src/priv-preface.adoc index c9a6def..55d9db6 100644 --- a/src/priv-preface.adoc +++ b/src/priv-preface.adoc @@ -81,6 +81,8 @@ anticipated to cause software portability problems in practice: Additionally, the following compatible changes have been made to the Machine and Supervisor ISAs since version 1.12: +* Defined the `misa`.B field to reflect that the B extension has been +implemented. * Defined the `misa`.V field to reflect that the V extension has been implemented. * Defined the RV32-only `medelegh` and `hedelegh` CSRs. |