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| author | Mukund Sivaraman <muks@mukund.org> | 2024-05-15 22:04:59 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-05-15 07:04:59 -0700 |
| commit | 1da2c71d79037d802650828d5ae5f4f846bda578 (patch) | |
| tree | e381da8b184af7c02831b1b50d71da92f2a31c37 | |
| parent | 1499e34452931ffabe09c52ebfcbcde1ec37c7ea (diff) | |
| download | riscv-isa-manual-1da2c71d79037d802650828d5ae5f4f846bda578.zip riscv-isa-manual-1da2c71d79037d802650828d5ae5f4f846bda578.tar.gz riscv-isa-manual-1da2c71d79037d802650828d5ae5f4f846bda578.tar.bz2 | |
Correct grammar (#1410)
| -rw-r--r-- | src/intro.adoc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intro.adoc b/src/intro.adoc index ff11012..c352092 100644 --- a/src/intro.adoc +++ b/src/intro.adoc @@ -539,7 +539,7 @@ Perhaps more importantly, by condensing our base ISA into a subset of the 32-bit instruction word, we leave more space available for non-standard and custom extensions. In particular, the base RV32I ISA uses less than 1/8 of the encoding space in the 32-bit instruction word. -As described <<extending>>, an implementation that does not require support +As described in <<extending>>, an implementation that does not require support for the standard compressed instruction extension can map 3 additional non-conforming 30-bit instruction spaces into the 32-bit fixed-width format, while preserving support for standard ≥32-bit instruction-set |