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authorStephen Twigg <sdtwigg@eecs.berkeley.edu>2014-04-03 16:46:45 -0700
committerStephen Twigg <sdtwigg@eecs.berkeley.edu>2014-04-03 16:46:45 -0700
commit4eba3595e63722d30f5bb173f60c474adbb3575e (patch)
tree90471116baa43ce0eb11397e0baba79a48688587
parent937aa638de2e6f46253fe56048450430f9ad3942 (diff)
downloadenv-4eba3595e63722d30f5bb173f60c474adbb3575e.zip
env-4eba3595e63722d30f5bb173f60c474adbb3575e.tar.gz
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Sync encoding.h with opcodes
-rw-r--r--encoding.h104
1 files changed, 61 insertions, 43 deletions
diff --git a/encoding.h b/encoding.h
index 8a4a342..089a8a9 100644
--- a/encoding.h
+++ b/encoding.h
@@ -103,15 +103,15 @@
#define MASK_AMOXOR_W 0xf800707f
#define MATCH_REMUW 0x200703b
#define MASK_REMUW 0xfe00707f
-#define MATCH_FMIN_D 0xc2000053
+#define MATCH_FMIN_D 0x2a000053
#define MASK_FMIN_D 0xfe00707f
#define MATCH_AMOMAX_D 0xa000302f
#define MASK_AMOMAX_D 0xf800707f
#define MATCH_BLTU 0x6063
#define MASK_BLTU 0x707f
-#define MATCH_FSGNJN_D 0x32000053
+#define MATCH_FSGNJN_D 0x22001053
#define MASK_FSGNJN_D 0xfe00707f
-#define MATCH_FMIN_S 0xc0000053
+#define MATCH_FMIN_S 0x28000053
#define MASK_FMIN_S 0xfe00707f
#define MATCH_CSRRW 0x1073
#define MASK_CSRRW 0x707f
@@ -119,11 +119,11 @@
#define MASK_SLLIW 0xfe00707f
#define MATCH_LB 0x3
#define MASK_LB 0x707f
-#define MATCH_FCVT_D_L 0x62000053
-#define MASK_FCVT_D_L 0xfff0007f
+#define MATCH_FMAX_S 0x28001053
+#define MASK_FMAX_S 0xfe00707f
#define MATCH_LH 0x1003
#define MASK_LH 0x707f
-#define MATCH_FCVT_D_W 0x72000053
+#define MATCH_FCVT_D_W 0xd2000053
#define MASK_FCVT_D_W 0xfff0007f
#define MATCH_LW 0x2003
#define MASK_LW 0x707f
@@ -131,11 +131,11 @@
#define MASK_ADD 0xfe00707f
#define MATCH_CSRRC 0x3073
#define MASK_CSRRC 0x707f
-#define MATCH_FMAX_D 0xca000053
+#define MATCH_FMAX_D 0x2a001053
#define MASK_FMAX_D 0xfe00707f
#define MATCH_BNE 0x1063
#define MASK_BNE 0x707f
-#define MATCH_FCVT_S_D 0x88000053
+#define MATCH_FCVT_S_D 0x40100053
#define MASK_FCVT_S_D 0xfff0007f
#define MATCH_BGEU 0x7063
#define MASK_BGEU 0x707f
@@ -145,13 +145,15 @@
#define MASK_SLTIU 0x707f
#define MATCH_FADD_S 0x53
#define MASK_FADD_S 0xfe00007f
-#define MATCH_FCVT_S_W 0x70000053
+#define MATCH_FCLASS_D 0xe2001053
+#define MASK_FCLASS_D 0xfff0707f
+#define MATCH_FCVT_S_W 0xd0000053
#define MASK_FCVT_S_W 0xfff0007f
#define MATCH_MUL 0x2000033
#define MASK_MUL 0xfe00707f
#define MATCH_AMOMINU_D 0xc000302f
#define MASK_AMOMINU_D 0xf800707f
-#define MATCH_FCVT_S_LU 0x68000053
+#define MATCH_FCVT_S_LU 0xd0300053
#define MASK_FCVT_S_LU 0xfff0007f
#define MATCH_SRLI 0x5013
#define MASK_SRLI 0xfc00707f
@@ -171,15 +173,15 @@
#define MASK_FENCE 0x707f
#define MATCH_FNMSUB_S 0x4b
#define MASK_FNMSUB_S 0x600007f
-#define MATCH_FCVT_L_S 0x40000053
+#define MATCH_FCVT_L_S 0xc0200053
#define MASK_FCVT_L_S 0xfff0007f
#define MATCH_SBREAK 0x100073
#define MASK_SBREAK 0xffffffff
-#define MATCH_FLE_S 0xb8000053
+#define MATCH_FLE_S 0xa0000053
#define MASK_FLE_S 0xfe00707f
#define MATCH_FDIV_S 0x18000053
#define MASK_FDIV_S 0xfe00007f
-#define MATCH_FLE_D 0xba000053
+#define MATCH_FLE_D 0xa2000053
#define MASK_FLE_D 0xfe00707f
#define MATCH_FENCE_I 0x100f
#define MASK_FENCE_I 0x707f
@@ -197,6 +199,8 @@
#define MASK_BLT 0x707f
#define MATCH_SCALL 0x73
#define MASK_SCALL 0xffffffff
+#define MATCH_FCLASS_S 0xe0001053
+#define MASK_FCLASS_S 0xfff0707f
#define MATCH_SC_W 0x1800202f
#define MASK_SC_W 0xf800707f
#define MATCH_REM 0x2006033
@@ -219,7 +223,7 @@
#define MASK_SRAI 0xfc00707f
#define MATCH_AMOAND_D 0x6000302f
#define MASK_AMOAND_D 0xf800707f
-#define MATCH_FLT_D 0xb2000053
+#define MATCH_FLT_D 0xa2001053
#define MASK_FLT_D 0xfe00707f
#define MATCH_SRAW 0x4000503b
#define MASK_SRAW 0xfe00707f
@@ -231,15 +235,15 @@
#define MASK_ORI 0x707f
#define MATCH_CSRRS 0x2073
#define MASK_CSRRS 0x707f
-#define MATCH_FLT_S 0xb0000053
+#define MATCH_FLT_S 0xa0001053
#define MASK_FLT_S 0xfe00707f
#define MATCH_ADDIW 0x1b
#define MASK_ADDIW 0x707f
#define MATCH_AMOAND_W 0x6000202f
#define MASK_AMOAND_W 0xf800707f
-#define MATCH_FEQ_S 0xa8000053
+#define MATCH_FEQ_S 0xa0002053
#define MASK_FEQ_S 0xfe00707f
-#define MATCH_FSGNJX_D 0x3a000053
+#define MATCH_FSGNJX_D 0x22002053
#define MASK_FSGNJX_D 0xfe00707f
#define MATCH_SRA 0x40005033
#define MASK_SRA 0xfe00707f
@@ -251,20 +255,20 @@
#define MASK_SRL 0xfe00707f
#define MATCH_FSUB_D 0xa000053
#define MASK_FSUB_D 0xfe00007f
-#define MATCH_FSGNJX_S 0x38000053
+#define MATCH_FSGNJX_S 0x20002053
#define MASK_FSGNJX_S 0xfe00707f
-#define MATCH_FEQ_D 0xaa000053
+#define MATCH_FEQ_D 0xa2002053
#define MASK_FEQ_D 0xfe00707f
-#define MATCH_FCVT_D_WU 0x7a000053
+#define MATCH_FCVT_D_WU 0xd2100053
#define MASK_FCVT_D_WU 0xfff0007f
#define MATCH_OR 0x6033
#define MASK_OR 0xfe00707f
-#define MATCH_FCVT_WU_D 0x5a000053
+#define MATCH_FCVT_WU_D 0xc2100053
#define MASK_FCVT_WU_D 0xfff0007f
#define MATCH_SUBW 0x4000003b
#define MASK_SUBW 0xfe00707f
-#define MATCH_FMAX_S 0xc8000053
-#define MASK_FMAX_S 0xfe00707f
+#define MATCH_FCVT_D_L 0xd2200053
+#define MASK_FCVT_D_L 0xfff0007f
#define MATCH_AMOMAXU_D 0xe000302f
#define MASK_AMOMAXU_D 0xf800707f
#define MATCH_XORI 0x4013
@@ -273,7 +277,7 @@
#define MASK_AMOXOR_D 0xf800707f
#define MATCH_AMOMAXU_W 0xe000202f
#define MASK_AMOMAXU_W 0xf800707f
-#define MATCH_FCVT_WU_S 0x58000053
+#define MATCH_FCVT_WU_S 0xc0100053
#define MASK_FCVT_WU_S 0xfff0007f
#define MATCH_ANDI 0x7013
#define MASK_ANDI 0x707f
@@ -289,7 +293,7 @@
#define MASK_LWU 0x707f
#define MATCH_FMV_X_D 0xe2000053
#define MASK_FMV_X_D 0xfff0707f
-#define MATCH_FCVT_D_S 0x82000053
+#define MATCH_FCVT_D_S 0x42000053
#define MASK_FCVT_D_S 0xfff0007f
#define MATCH_FNMADD_D 0x200004f
#define MASK_FNMADD_D 0x600007f
@@ -297,17 +301,17 @@
#define MASK_AMOADD_D 0xf800707f
#define MATCH_LR_D 0x1000302f
#define MASK_LR_D 0xf9f0707f
-#define MATCH_FCVT_W_S 0x50000053
+#define MATCH_FCVT_W_S 0xc0000053
#define MASK_FCVT_W_S 0xfff0007f
#define MATCH_MULHSU 0x2002033
#define MASK_MULHSU 0xfe00707f
#define MATCH_AMOADD_W 0x202f
#define MASK_AMOADD_W 0xf800707f
-#define MATCH_FCVT_D_LU 0x6a000053
+#define MATCH_FCVT_D_LU 0xd2300053
#define MASK_FCVT_D_LU 0xfff0007f
#define MATCH_LR_W 0x1000202f
#define MASK_LR_W 0xf9f0707f
-#define MATCH_FCVT_W_D 0x52000053
+#define MATCH_FCVT_W_D 0xc2000053
#define MASK_FCVT_W_D 0xfff0007f
#define MATCH_SLT 0x2033
#define MASK_SLT 0xfe00707f
@@ -341,25 +345,25 @@
#define MASK_FMV_D_X 0xfff0707f
#define MATCH_LBU 0x4003
#define MASK_LBU 0x707f
-#define MATCH_FSGNJ_S 0x28000053
+#define MATCH_FSGNJ_S 0x20000053
#define MASK_FSGNJ_S 0xfe00707f
#define MATCH_AMOMAX_W 0xa000202f
#define MASK_AMOMAX_W 0xf800707f
-#define MATCH_FSGNJ_D 0x2a000053
+#define MATCH_FSGNJ_D 0x22000053
#define MASK_FSGNJ_D 0xfe00707f
#define MATCH_MULHU 0x2003033
#define MASK_MULHU 0xfe00707f
-#define MATCH_FCVT_L_D 0x42000053
+#define MATCH_FCVT_L_D 0xc2200053
#define MASK_FCVT_L_D 0xfff0007f
-#define MATCH_FCVT_S_WU 0x78000053
+#define MATCH_FCVT_S_WU 0xd0100053
#define MASK_FCVT_S_WU 0xfff0007f
-#define MATCH_FCVT_LU_S 0x48000053
+#define MATCH_FCVT_LU_S 0xc0300053
#define MASK_FCVT_LU_S 0xfff0007f
-#define MATCH_FCVT_S_L 0x60000053
+#define MATCH_FCVT_S_L 0xd0200053
#define MASK_FCVT_S_L 0xfff0007f
#define MATCH_AUIPC 0x17
#define MASK_AUIPC 0x7f
-#define MATCH_FCVT_LU_D 0x4a000053
+#define MATCH_FCVT_LU_D 0xc2300053
#define MASK_FCVT_LU_D 0xfff0007f
#define MATCH_CSRRWI 0x5073
#define MASK_CSRRWI 0x707f
@@ -367,15 +371,15 @@
#define MASK_SC_D 0xf800707f
#define MATCH_FMADD_S 0x43
#define MASK_FMADD_S 0x600007f
-#define MATCH_FSQRT_S 0x20000053
+#define MATCH_FSQRT_S 0x58000053
#define MASK_FSQRT_S 0xfff0007f
#define MATCH_AMOMIN_W 0x8000202f
#define MASK_AMOMIN_W 0xf800707f
-#define MATCH_FSGNJN_S 0x30000053
+#define MATCH_FSGNJN_S 0x20001053
#define MASK_FSGNJN_S 0xfe00707f
#define MATCH_AMOSWAP_D 0x800302f
#define MASK_AMOSWAP_D 0xf800707f
-#define MATCH_FSQRT_D 0x22000053
+#define MATCH_FSQRT_D 0x5a000053
#define MASK_FSQRT_D 0xfff0007f
#define MATCH_FMADD_D 0x2000043
#define MASK_FMADD_D 0x600007f
@@ -410,6 +414,7 @@
#define CSR_FFLAGS 0x1
#define CSR_FRM 0x2
#define CSR_FCSR 0x3
+#define CSR_STATS 0xc0
#define CSR_SUP0 0x500
#define CSR_SUP1 0x501
#define CSR_EPC 0x502
@@ -426,7 +431,6 @@
#define CSR_FATC 0x50d
#define CSR_SEND_IPI 0x50e
#define CSR_CLEAR_IPI 0x50f
-#define CSR_STATS 0x51c
#define CSR_RESET 0x51d
#define CSR_TOHOST 0x51e
#define CSR_FROMHOST 0x51f
@@ -449,6 +453,10 @@
#define CSR_UARCH13 0xccd
#define CSR_UARCH14 0xcce
#define CSR_UARCH15 0xccf
+#define CSR_COUNTH 0x586
+#define CSR_CYCLEH 0xc80
+#define CSR_TIMEH 0xc81
+#define CSR_INSTRETH 0xc82
#define CAUSE_MISALIGNED_FETCH 0x0
#define CAUSE_FAULT_FETCH 0x1
#define CAUSE_ILLEGAL_INSTRUCTION 0x2
@@ -474,7 +482,7 @@ DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S)
DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
DECLARE_INSN(lb, MATCH_LB, MASK_LB)
-DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L)
+DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S)
DECLARE_INSN(lh, MATCH_LH, MASK_LH)
DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W)
DECLARE_INSN(lw, MATCH_LW, MASK_LW)
@@ -487,6 +495,7 @@ DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU)
DECLARE_INSN(fadd_d, MATCH_FADD_D, MASK_FADD_D)
DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU)
DECLARE_INSN(fadd_s, MATCH_FADD_S, MASK_FADD_S)
+DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D)
DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W)
DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)
DECLARE_INSN(amominu_d, MATCH_AMOMINU_D, MASK_AMOMINU_D)
@@ -513,6 +522,7 @@ DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
DECLARE_INSN(sub, MATCH_SUB, MASK_SUB)
DECLARE_INSN(blt, MATCH_BLT, MASK_BLT)
DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL)
+DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S)
DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W)
DECLARE_INSN(rem, MATCH_REM, MASK_REM)
DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW)
@@ -546,7 +556,7 @@ DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU)
DECLARE_INSN(or, MATCH_OR, MASK_OR)
DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D)
DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW)
-DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S)
+DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L)
DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D)
DECLARE_INSN(xori, MATCH_XORI, MASK_XORI)
DECLARE_INSN(amoxor_d, MATCH_AMOXOR_D, MASK_AMOXOR_D)
@@ -623,6 +633,7 @@ DECLARE_INSN(sd, MATCH_SD, MASK_SD)
DECLARE_CSR(fflags, CSR_FFLAGS)
DECLARE_CSR(frm, CSR_FRM)
DECLARE_CSR(fcsr, CSR_FCSR)
+DECLARE_CSR(stats, CSR_STATS)
DECLARE_CSR(sup0, CSR_SUP0)
DECLARE_CSR(sup1, CSR_SUP1)
DECLARE_CSR(epc, CSR_EPC)
@@ -639,7 +650,6 @@ DECLARE_CSR(impl, CSR_IMPL)
DECLARE_CSR(fatc, CSR_FATC)
DECLARE_CSR(send_ipi, CSR_SEND_IPI)
DECLARE_CSR(clear_ipi, CSR_CLEAR_IPI)
-DECLARE_CSR(stats, CSR_STATS)
DECLARE_CSR(reset, CSR_RESET)
DECLARE_CSR(tohost, CSR_TOHOST)
DECLARE_CSR(fromhost, CSR_FROMHOST)
@@ -662,11 +672,16 @@ DECLARE_CSR(uarch12, CSR_UARCH12)
DECLARE_CSR(uarch13, CSR_UARCH13)
DECLARE_CSR(uarch14, CSR_UARCH14)
DECLARE_CSR(uarch15, CSR_UARCH15)
+DECLARE_CSR(counth, CSR_COUNTH)
+DECLARE_CSR(cycleh, CSR_CYCLEH)
+DECLARE_CSR(timeh, CSR_TIMEH)
+DECLARE_CSR(instreth, CSR_INSTRETH)
#endif
#ifdef DECLARE_CAUSE
DECLARE_CAUSE("fflags", CAUSE_FFLAGS)
DECLARE_CAUSE("frm", CAUSE_FRM)
DECLARE_CAUSE("fcsr", CAUSE_FCSR)
+DECLARE_CAUSE("stats", CAUSE_STATS)
DECLARE_CAUSE("sup0", CAUSE_SUP0)
DECLARE_CAUSE("sup1", CAUSE_SUP1)
DECLARE_CAUSE("epc", CAUSE_EPC)
@@ -683,7 +698,6 @@ DECLARE_CAUSE("impl", CAUSE_IMPL)
DECLARE_CAUSE("fatc", CAUSE_FATC)
DECLARE_CAUSE("send_ipi", CAUSE_SEND_IPI)
DECLARE_CAUSE("clear_ipi", CAUSE_CLEAR_IPI)
-DECLARE_CAUSE("stats", CAUSE_STATS)
DECLARE_CAUSE("reset", CAUSE_RESET)
DECLARE_CAUSE("tohost", CAUSE_TOHOST)
DECLARE_CAUSE("fromhost", CAUSE_FROMHOST)
@@ -706,4 +720,8 @@ DECLARE_CAUSE("uarch12", CAUSE_UARCH12)
DECLARE_CAUSE("uarch13", CAUSE_UARCH13)
DECLARE_CAUSE("uarch14", CAUSE_UARCH14)
DECLARE_CAUSE("uarch15", CAUSE_UARCH15)
+DECLARE_CAUSE("counth", CAUSE_COUNTH)
+DECLARE_CAUSE("cycleh", CAUSE_CYCLEH)
+DECLARE_CAUSE("timeh", CAUSE_TIMEH)
+DECLARE_CAUSE("instreth", CAUSE_INSTRETH)
#endif