aboutsummaryrefslogtreecommitdiff
path: root/debug/targets/freedom-e300-sim/openocd.cfg
blob: f3d9cb43a596f8fd90263d0cfaebff33da5c2903 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
adapter_khz     10000

source [find interface/jtag_vpi.cfg]
jtag_vpi_set_port $::env(JTAG_VPI_PORT)

set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -chain-position $_TARGETNAME -rtos riscv

init
halt