From af7bcec998b72b2b91180c83b45151201fa1c150 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Mon, 29 Feb 2016 10:00:15 -0800 Subject: Separate M, and A from I. Allow disabling of M,A,F This allows riscv-tests to be built with a compiler that supports not just RVG. --- isa/rv32um/remu.S | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 isa/rv32um/remu.S (limited to 'isa/rv32um/remu.S') diff --git a/isa/rv32um/remu.S b/isa/rv32um/remu.S new file mode 100644 index 0000000..38d641d --- /dev/null +++ b/isa/rv32um/remu.S @@ -0,0 +1,41 @@ +# See LICENSE for license details. + +#***************************************************************************** +# remu.S +#----------------------------------------------------------------------------- +# +# Test remu instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV32U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, remu, 2, 20, 6 ); + TEST_RR_OP( 3, remu, 2, -20, 6 ); + TEST_RR_OP( 4, remu, 20, 20, -6 ); + TEST_RR_OP( 5, remu, -20, -20, -6 ); + + TEST_RR_OP( 6, remu, 0, -1<<63, 1 ); + TEST_RR_OP( 7, remu, -1<<63, -1<<63, -1 ); + + TEST_RR_OP( 8, remu, -1<<63, -1<<63, 0 ); + TEST_RR_OP( 9, remu, 1, 1, 0 ); + TEST_RR_OP(10, remu, 0, 0, 0 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +RVTEST_DATA_END -- cgit v1.1