From af7bcec998b72b2b91180c83b45151201fa1c150 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Mon, 29 Feb 2016 10:00:15 -0800 Subject: Separate M, and A from I. Allow disabling of M,A,F This allows riscv-tests to be built with a compiler that supports not just RVG. --- isa/rv32ui/amoor_w.S | 65 ---------------------------------------------------- 1 file changed, 65 deletions(-) delete mode 100644 isa/rv32ui/amoor_w.S (limited to 'isa/rv32ui/amoor_w.S') diff --git a/isa/rv32ui/amoor_w.S b/isa/rv32ui/amoor_w.S deleted file mode 100644 index 0988c66..0000000 --- a/isa/rv32ui/amoor_w.S +++ /dev/null @@ -1,65 +0,0 @@ -# See LICENSE for license details. - -#***************************************************************************** -# amoor.w.S -#----------------------------------------------------------------------------- -# -# Test amoor.w instruction. -# - -#include "riscv_test.h" -#include "test_macros.h" - -RVTEST_RV32U -RVTEST_CODE_BEGIN - - TEST_CASE(2, a4, 0x80000000, \ - li a0, 0x80000000; \ - li a1, 0xfffff800; \ - la a3, amo_operand; \ - sw a0, 0(a3); \ - nop; nop; nop; nop; \ - nop; nop; nop; nop; \ - nop; nop; nop; nop; \ - nop; nop; nop; nop; \ - nop; nop; nop; nop; \ - nop; nop; nop; nop; \ - nop; nop; nop; nop; \ - amoor.w a4, a1, 0(a3); \ - ) - - TEST_CASE(3, a5, 0xfffff800, lw a5, 0(a3)) - - # try again after a cache miss - TEST_CASE(4, a4, 0xfffff800, \ - li a1, 1; \ - li a4, 16384; \ - add a5, a3, a4; \ - lw x0, 0(a5); \ - add a5, a5, a4; \ - lw x0, 0(a5); \ - add a5, a5, a4; \ - lw x0, 0(a5); \ - add a5, a5, a4; \ - lw x0, 0(a5); \ - amoor.w a4, a1, 0(a3); \ - ) - - TEST_CASE(5, a5, 0xfffff801, lw a5, 0(a3)) - - TEST_PASSFAIL - -RVTEST_CODE_END - - .data -RVTEST_DATA_BEGIN - - TEST_DATA - -RVTEST_DATA_END - - .bss - .align 3 -amo_operand: - .dword 0 - .skip 65536 -- cgit v1.1