| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2016-02-29 | Separate M, and A from I. Allow disabling of M,A,Ftravis-dev | Colin Schmidt | 1 | -0/+2 |
| 2016-01-12 | Write 1, not 0, to MIPI | Andrew Waterman | 1 | -1/+1 |
| 2015-11-16 | Update IPI test to work with new mechanism | Andrew Waterman | 1 | -17/+3 |
| 2015-10-19 | Avoid REMU in timer test | Andrew Waterman | 1 | -2/+7 |
| 2015-07-05 | New M-mode timers | Andrew Waterman | 1 | -4/+1094 |
| 2015-05-19 | Add basic WFI test | Andrew Waterman | 2 | -0/+9 |
| 2015-05-09 | Update to privileged architecture version 1.7 | Andrew Waterman | 4 | -4/+36 |
| 2015-04-03 | Run RV32 tests on spike with --isa=RV32 | Andrew Waterman | 1 | -1/+1 |
| 2015-03-27 | New virtual memory implementation (Sv39) | Andrew Waterman | 1 | -4/+4 |
| 2015-03-25 | split out S-mode tests and M-mode tests | Yunsup Lee | 10 | -0/+221 |
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index : riscv-tools/riscv-tests.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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