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riscv-tools/riscv-tests.git
attempt-travis-fix
ceasetest2
compliance_tests
cs152-sp18-lab3
debug
debug-0.13
debug-clear-satp
debug-delete-sim
debug_auth
debug_disassemble
disable_unavailable
dma-memcpy
eos20-bringup
hw_watchpoint
interrupts
master
misc
no_progbuf
priv
privchange-dontdeleteme
python3
rekall
resume_from_trigger
riscv-tests-sail
rtos
rvt-master
smi-demo
split-isa-tests
sqrt-171
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trap_entry_align
trap_entry_align-1
travis-dev
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Author
Files
Lines
2016-03-14
Update .gitignore
Andrew Waterman
1
-0
/
+1
2016-03-14
Merge branch 'priv-1.9'
Andrew Waterman
31
-363
/
+320
2016-03-14
More RV32 tests
Andrew Waterman
5
-10
/
+76
2016-03-10
Add missing rv32mi/rv32si tests
Andrew Waterman
8
-3
/
+43
2016-03-07
revert install rule to the old correct way
Howard Mao
1
-2
/
+2
2016-03-03
Undo accidental Makefile modification
Andrew Waterman
1
-1
/
+1
2016-03-03
Make WFI test more strict
Andrew Waterman
2
-7
/
+5
2016-03-03
Some S-mode tests really only belong in M-mode
Andrew Waterman
13
-193
/
+135
2016-03-03
Make JALR test sensible in RISC-V, rather than SMIPS
Andrew Waterman
2
-121
/
+18
2016-03-03
Fix ma_fetch to work with or without RVC
Andrew Waterman
1
-8
/
+18
2016-03-03
WIP on priv spec v1.9
Andrew Waterman
2
-4
/
+4
2016-03-03
WIP on priv spec v1.9
Andrew Waterman
8
-33
/
+37
2016-03-03
Fix ./configure in root
Andrew Waterman
4
-27
/
+30
2016-03-01
Negative float -> unsigned int conversions return 0
Andrew Waterman
1
-17
/
+17
2016-02-29
Merge pull request #8 from riscv/sqrt-171
Colin Schmidt
1
-0
/
+5
2016-02-29
remove comments now that tests pass
sqrt-171
Colin Schmidt
1
-2
/
+0
2016-02-28
Fix capitalization of XLEN variable
Andrew Waterman
1
-1
/
+1
2016-02-28
Strip big-endian tests
Andrew Waterman
4
-24
/
+0
2016-02-27
Merge pull request #10 from riscv/travis-dev
Palmer Dabbelt
5
-103
/
+302
2016-02-27
only build the rv32 bit tests if xlen is 32
Colin Schmidt
1
-0
/
+3
2016-02-27
remove malloc declaration from dhrystone
Colin Schmidt
1
-1
/
+0
2016-02-27
allow make variables to be overwritten update configure
Colin Schmidt
4
-102
/
+299
2016-02-24
add new failing fsqrt test case
Colin Schmidt
1
-0
/
+3
2016-02-23
make install rule copy the right things to the right places
Howard Mao
1
-4
/
+8
2016-02-23
fix install rule
Howard Mao
1
-0
/
+1
2016-02-18
What is the square root of 171?
Palmer Dabbelt
1
-0
/
+4
2016-01-29
Merge pull request #7 from riscv/nan2
Andrew Waterman
3
-0
/
+23
2016-01-29
Test that fcvt canonicalizes NaNs
Palmer Dabbelt
1
-0
/
+12
2016-01-29
Check NAN values in fdiv tests
Palmer Dabbelt
2
-0
/
+11
2016-01-12
Use new NaN handling for conversions to integer
Andrew Waterman
1
-4
/
+4
2016-01-12
Use new canonical NaN
Andrew Waterman
1
-0
/
+4
2016-01-12
Write 1, not 0, to MIPI
Andrew Waterman
1
-1
/
+1
2015-12-14
change la to li as appropriate in test macros
Howard Mao
1
-2
/
+2
2015-12-04
Merge pull request #4 from pmundkur/devel
Andrew Waterman
1
-1
/
+6
2015-11-16
Update IPI test to work with new mechanism
Andrew Waterman
1
-17
/
+3
2015-11-06
update env
Andrew Waterman
1
-5
/
+5
2015-10-19
Avoid REMU in timer test
Andrew Waterman
1
-2
/
+7
2015-09-28
fix to riscv_test.h in env
Howard Mao
1
-5
/
+5
2015-09-24
Add another recoding test
Andrew Waterman
1
-0
/
+9
2015-09-21
Add another recoding test case
Andrew Waterman
1
-0
/
+8
2015-09-20
Remove executable permissions from source files
Andrew Waterman
32
-0
/
+0
2015-09-20
Remove Hwacha v3 tests
Andrew Waterman
130
-42135
/
+21
2015-09-20
Add another FP recoding test case
Andrew Waterman
1
-6
/
+20
2015-09-16
Add test for FP recoding corner cases
Andrew Waterman
2
-1
/
+37
2015-08-06
Add a top-level make clean target.
Prashanth Mundkur
1
-1
/
+6
2015-08-03
Use medany code model, not PIC, for ISA tests
Andrew Waterman
1
-1
/
+1
2015-07-17
don't pass fpu/vector tests when fpu/vector not present
Yunsup Lee
1
-8
/
+5
2015-07-06
Coherence torture test for VM tests
Andrew Waterman
2
-7
/
+11
2015-07-05
New M-mode timers
Andrew Waterman
7
-1148
/
+1102
2015-07-02
Fix RV32 handling of syscall arguments
Andrew Waterman
2
-63
/
+65
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