1 files changed, 97 insertions, 0 deletions
diff --git a/isa/rv64uv/bgeu.S b/isa/rv64uv/bgeu.S
new file mode 100644
index 0000000..5f54670
--- /dev/null
+++ b/isa/rv64uv/bgeu.S
@@ -0,0 +1,97 @@
+#*****************************************************************************
+# bgeu.S
+#-----------------------------------------------------------------------------
+#
+# Test bgeu instruction in a vf block.
+#
+
+#include "riscv_test.h"
+#include "test_macros.h"
+
+RVTEST_RV64U
+RVTEST_CODE_BEGIN
+
+  #-------------------------------------------------------------
+  # Branch tests
+  #-------------------------------------------------------------
+
+  # Each test checks both forward and backward branches
+
+  TEST_BR2_OP_TAKEN( 2, bgeu, 0x00000000, 0x00000000 );
+  TEST_BR2_OP_TAKEN( 3, bgeu, 0x00000001, 0x00000001 );
+  TEST_BR2_OP_TAKEN( 4, bgeu, 0xffffffff, 0xffffffff );
+  TEST_BR2_OP_TAKEN( 5, bgeu, 0x00000001, 0x00000000 );
+  TEST_BR2_OP_TAKEN( 6, bgeu, 0xffffffff, 0xfffffffe );
+  TEST_BR2_OP_TAKEN( 7, bgeu, 0xffffffff, 0x00000000 );
+
+  TEST_BR2_OP_NOTTAKEN(  8, bgeu, 0x00000000, 0x00000001 );
+  TEST_BR2_OP_NOTTAKEN(  9, bgeu, 0xfffffffe, 0xffffffff );
+  TEST_BR2_OP_NOTTAKEN( 10, bgeu, 0x00000000, 0xffffffff );
+  TEST_BR2_OP_NOTTAKEN( 11, bgeu, 0x7fffffff, 0x80000000 );
+
+  #-------------------------------------------------------------
+  # Bypassing tests
+  #-------------------------------------------------------------
+
+  TEST_BR2_SRC12_BYPASS( 12, 0, 0, bgeu, 0xefffffff, 0xf0000000 );
+  TEST_BR2_SRC12_BYPASS( 13, 0, 1, bgeu, 0xefffffff, 0xf0000000 );
+  TEST_BR2_SRC12_BYPASS( 14, 0, 2, bgeu, 0xefffffff, 0xf0000000 );
+  TEST_BR2_SRC12_BYPASS( 15, 1, 0, bgeu, 0xefffffff, 0xf0000000 );
+  TEST_BR2_SRC12_BYPASS( 16, 1, 1, bgeu, 0xefffffff, 0xf0000000 );
+  TEST_BR2_SRC12_BYPASS( 17, 2, 0, bgeu, 0xefffffff, 0xf0000000 );
+
+  TEST_BR2_SRC12_BYPASS( 18, 0, 0, bgeu, 0xefffffff, 0xf0000000 );
+  TEST_BR2_SRC12_BYPASS( 19, 0, 1, bgeu, 0xefffffff, 0xf0000000 );
+  TEST_BR2_SRC12_BYPASS( 20, 0, 2, bgeu, 0xefffffff, 0xf0000000 );
+  TEST_BR2_SRC12_BYPASS( 21, 1, 0, bgeu, 0xefffffff, 0xf0000000 );
+  TEST_BR2_SRC12_BYPASS( 22, 1, 1, bgeu, 0xefffffff, 0xf0000000 );
+  TEST_BR2_SRC12_BYPASS( 23, 2, 0, bgeu, 0xefffffff, 0xf0000000 );
+
+  #-------------------------------------------------------------
+  # Test when uts diverge
+  #-------------------------------------------------------------
+
+  TEST_BR2_DIVERGED_ODD_EVEN( 24, bgeu, 1, 1, \
+    addi x3, x3, 1; \
+  )
+  TEST_BR2_DIVERGED_ODD_EVEN( 25, bgeu, 2, 2, \
+    addi x3, x3, 1; \
+  )
+  TEST_BR2_DIVERGED_ODD_EVEN( 26, bgeu, 3, 3, \
+    addi x3, x3, 1; \
+  )
+
+  TEST_BR2_DIVERGED_ODD_EVEN( 27, bgeu, 1, 16, \
+    addi x3, x3, 4; \
+    mul x3, x3, x3; \
+  )
+  TEST_BR2_DIVERGED_ODD_EVEN( 28, bgeu, 2, 400, \
+    addi x3, x3, 4; \
+    mul x3, x3, x3; \
+  )
+  TEST_BR2_DIVERGED_ODD_EVEN( 29, bgeu, 3, 163216, \
+    addi x3, x3, 4; \
+    mul x3, x3, x3; \
+  )        
+
+  TEST_BR2_DIVERGED_FULL12( 30, bgeu, 1, 1, \
+    addi x3, x3, 1; \
+  )
+
+  TEST_BR2_DIVERGED_FULL12( 31, bgeu, 1, 16, \
+    addi x3, x3, 4; \
+    mul x3, x3, x3; \
+  )
+
+  TEST_BR2_DIVERGED_MEM_FULL12( 32, bgeu, 1);
+
+  TEST_PASSFAIL
+
+RVTEST_CODE_END
+
+  .data
+RVTEST_DATA_BEGIN
+
+  TEST_DATA
+
+RVTEST_DATA_END