diff options
Diffstat (limited to 'isa/rv64sv')
-rw-r--r-- | isa/rv64sv/illegal_cfg_nfpr.S | 10 | ||||
-rw-r--r-- | isa/rv64sv/illegal_cfg_nxpr.S | 10 | ||||
-rw-r--r-- | isa/rv64sv/illegal_inst.S | 10 | ||||
-rw-r--r-- | isa/rv64sv/illegal_vt_inst.S | 10 | ||||
-rw-r--r-- | isa/rv64sv/ma_utld.S | 10 | ||||
-rw-r--r-- | isa/rv64sv/ma_utsd.S | 10 | ||||
-rw-r--r-- | isa/rv64sv/ma_vld.S | 10 | ||||
-rw-r--r-- | isa/rv64sv/ma_vsd.S | 10 | ||||
-rw-r--r-- | isa/rv64sv/ma_vt_inst.S | 10 | ||||
-rw-r--r-- | isa/rv64sv/privileged_inst.S | 10 |
10 files changed, 50 insertions, 50 deletions
diff --git a/isa/rv64sv/illegal_cfg_nfpr.S b/isa/rv64sv/illegal_cfg_nfpr.S index a636a36..fba7e78 100644 --- a/isa/rv64sv/illegal_cfg_nfpr.S +++ b/isa/rv64sv/illegal_cfg_nfpr.S @@ -34,7 +34,7 @@ vtcode2: handler: vxcptkill - li x28,2 + li TESTNUM,2 # check cause vxcptcause a3 @@ -63,16 +63,16 @@ handler: ld a1,0(a5) li a2,5 - li x28,2 + li TESTNUM,2 bne a1,a2,fail ld a1,8(a5) - li x28,3 + li TESTNUM,3 bne a1,a2,fail ld a1,16(a5) - li x28,4 + li TESTNUM,4 bne a1,a2,fail ld a1,24(a5) - li x28,5 + li TESTNUM,5 bne a1,a2,fail TEST_PASSFAIL diff --git a/isa/rv64sv/illegal_cfg_nxpr.S b/isa/rv64sv/illegal_cfg_nxpr.S index e6190c9..f03b443 100644 --- a/isa/rv64sv/illegal_cfg_nxpr.S +++ b/isa/rv64sv/illegal_cfg_nxpr.S @@ -33,7 +33,7 @@ vtcode2: handler: vxcptkill - li x28,2 + li TESTNUM,2 # check cause vxcptcause a3 @@ -62,16 +62,16 @@ handler: ld a1,0(a5) li a2,5 - li x28,2 + li TESTNUM,2 bne a1,a2,fail ld a1,8(a5) - li x28,3 + li TESTNUM,3 bne a1,a2,fail ld a1,16(a5) - li x28,4 + li TESTNUM,4 bne a1,a2,fail ld a1,24(a5) - li x28,5 + li TESTNUM,5 bne a1,a2,fail TEST_PASSFAIL diff --git a/isa/rv64sv/illegal_inst.S b/isa/rv64sv/illegal_inst.S index c16086e..6896b89 100644 --- a/isa/rv64sv/illegal_inst.S +++ b/isa/rv64sv/illegal_inst.S @@ -40,7 +40,7 @@ vtcode2: handler: vxcptkill - li x28,2 + li TESTNUM,2 # check cause vxcptcause a3 @@ -69,16 +69,16 @@ handler: ld a1,0(a5) li a2,5 - li x28,2 + li TESTNUM,2 bne a1,a2,fail ld a1,8(a5) - li x28,3 + li TESTNUM,3 bne a1,a2,fail ld a1,16(a5) - li x28,4 + li TESTNUM,4 bne a1,a2,fail ld a1,24(a5) - li x28,5 + li TESTNUM,5 bne a1,a2,fail TEST_PASSFAIL diff --git a/isa/rv64sv/illegal_vt_inst.S b/isa/rv64sv/illegal_vt_inst.S index ce4fe82..c240076 100644 --- a/isa/rv64sv/illegal_vt_inst.S +++ b/isa/rv64sv/illegal_vt_inst.S @@ -48,7 +48,7 @@ vtcode2: handler: vxcptkill - li x28,2 + li TESTNUM,2 # check cause vxcptcause a3 @@ -77,16 +77,16 @@ handler: ld a1,0(a5) li a2,5 - li x28,2 + li TESTNUM,2 bne a1,a2,fail ld a1,8(a5) - li x28,3 + li TESTNUM,3 bne a1,a2,fail ld a1,16(a5) - li x28,4 + li TESTNUM,4 bne a1,a2,fail ld a1,24(a5) - li x28,5 + li TESTNUM,5 bne a1,a2,fail TEST_PASSFAIL diff --git a/isa/rv64sv/ma_utld.S b/isa/rv64sv/ma_utld.S index c48e134..b139edf 100644 --- a/isa/rv64sv/ma_utld.S +++ b/isa/rv64sv/ma_utld.S @@ -44,7 +44,7 @@ vtcode2: handler: vxcptkill - li x28,2 + li TESTNUM,2 # check cause vxcptcause a3 @@ -73,16 +73,16 @@ handler: ld a1,0(a5) li a2,5 - li x28,2 + li TESTNUM,2 bne a1,a2,fail ld a1,8(a5) - li x28,3 + li TESTNUM,3 bne a1,a2,fail ld a1,16(a5) - li x28,4 + li TESTNUM,4 bne a1,a2,fail ld a1,24(a5) - li x28,5 + li TESTNUM,5 bne a1,a2,fail TEST_PASSFAIL diff --git a/isa/rv64sv/ma_utsd.S b/isa/rv64sv/ma_utsd.S index 3879d51..56ece92 100644 --- a/isa/rv64sv/ma_utsd.S +++ b/isa/rv64sv/ma_utsd.S @@ -45,7 +45,7 @@ vtcode2: handler: vxcptkill - li x28,2 + li TESTNUM,2 # check cause vxcptcause a3 @@ -74,16 +74,16 @@ handler: ld a1,0(a5) li a2,5 - li x28,2 + li TESTNUM,2 bne a1,a2,fail ld a1,8(a5) - li x28,3 + li TESTNUM,3 bne a1,a2,fail ld a1,16(a5) - li x28,4 + li TESTNUM,4 bne a1,a2,fail ld a1,24(a5) - li x28,5 + li TESTNUM,5 bne a1,a2,fail TEST_PASSFAIL diff --git a/isa/rv64sv/ma_vld.S b/isa/rv64sv/ma_vld.S index d66c42f..57b6bf9 100644 --- a/isa/rv64sv/ma_vld.S +++ b/isa/rv64sv/ma_vld.S @@ -45,7 +45,7 @@ vtcode2: handler: vxcptkill - li x28,2 + li TESTNUM,2 # check cause vxcptcause a3 @@ -74,16 +74,16 @@ handler: ld a1,0(a5) li a2,5 - li x28,2 + li TESTNUM,2 bne a1,a2,fail ld a1,8(a5) - li x28,3 + li TESTNUM,3 bne a1,a2,fail ld a1,16(a5) - li x28,4 + li TESTNUM,4 bne a1,a2,fail ld a1,24(a5) - li x28,5 + li TESTNUM,5 bne a1,a2,fail TEST_PASSFAIL diff --git a/isa/rv64sv/ma_vsd.S b/isa/rv64sv/ma_vsd.S index 715e6a2..90eb792 100644 --- a/isa/rv64sv/ma_vsd.S +++ b/isa/rv64sv/ma_vsd.S @@ -48,7 +48,7 @@ vtcode2: handler: vxcptkill - li x28,2 + li TESTNUM,2 # check cause vxcptcause a3 @@ -77,16 +77,16 @@ handler: ld a1,0(a5) li a2,5 - li x28,2 + li TESTNUM,2 bne a1,a2,fail ld a1,8(a5) - li x28,3 + li TESTNUM,3 bne a1,a2,fail ld a1,16(a5) - li x28,4 + li TESTNUM,4 bne a1,a2,fail ld a1,24(a5) - li x28,5 + li TESTNUM,5 bne a1,a2,fail TEST_PASSFAIL diff --git a/isa/rv64sv/ma_vt_inst.S b/isa/rv64sv/ma_vt_inst.S index c8ef5ad..cd7762d 100644 --- a/isa/rv64sv/ma_vt_inst.S +++ b/isa/rv64sv/ma_vt_inst.S @@ -38,7 +38,7 @@ vtcode1: handler: vxcptkill - li x28,2 + li TESTNUM,2 # check cause vxcptcause a3 @@ -67,16 +67,16 @@ handler: ld a1,0(a5) li a2,5 - li x28,2 + li TESTNUM,2 bne a1,a2,fail ld a1,8(a5) - li x28,3 + li TESTNUM,3 bne a1,a2,fail ld a1,16(a5) - li x28,4 + li TESTNUM,4 bne a1,a2,fail ld a1,24(a5) - li x28,5 + li TESTNUM,5 bne a1,a2,fail TEST_PASSFAIL diff --git a/isa/rv64sv/privileged_inst.S b/isa/rv64sv/privileged_inst.S index 1a88ca3..ef50188 100644 --- a/isa/rv64sv/privileged_inst.S +++ b/isa/rv64sv/privileged_inst.S @@ -37,7 +37,7 @@ vtcode2: handler: vxcptkill - li x28,2 + li TESTNUM,2 # check cause vxcptcause a3 @@ -67,16 +67,16 @@ handler: ld a1,0(a5) li a2,5 - li x28,2 + li TESTNUM,2 bne a1,a2,fail ld a1,8(a5) - li x28,3 + li TESTNUM,3 bne a1,a2,fail ld a1,16(a5) - li x28,4 + li TESTNUM,4 bne a1,a2,fail ld a1,24(a5) - li x28,5 + li TESTNUM,5 bne a1,a2,fail TEST_PASSFAIL |