diff options
-rw-r--r-- | debug/targets/RISC-V/spike32-2-hwthread.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/debug/targets/RISC-V/spike32-2-hwthread.py b/debug/targets/RISC-V/spike32-2-hwthread.py index e84391a..d54136d 100644 --- a/debug/targets/RISC-V/spike32-2-hwthread.py +++ b/debug/targets/RISC-V/spike32-2-hwthread.py @@ -4,13 +4,13 @@ import testlib import spike32 # pylint: disable=import-error class spike32_2(targets.Target): - harts = [spike32.spike32_hart(misa=0x40341101), - spike32.spike32_hart(misa=0x40341101)] + harts = [spike32.spike32_hart(misa=0x40341129), + spike32.spike32_hart(misa=0x40341129)] openocd_config_path = "spike-2-hwthread.cfg" timeout_sec = 5 implements_custom_test = True support_memory_sampling = False # not supported without sba def create(self): - return testlib.Spike(self, isa="RV32IMAV", support_hasel=True, + return testlib.Spike(self, isa="RV32IMAFDV", support_hasel=True, support_haltgroups=False) |