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| author | Yunsup Lee <yunsup@cs.berkeley.edu> | 2014-03-02 02:43:04 -0800 |
|---|---|---|
| committer | Yunsup Lee <yunsup@cs.berkeley.edu> | 2014-03-02 02:43:04 -0800 |
| commit | bcebb088e573ed9fc90babaf5f0eae588d605cdc (patch) | |
| tree | 6f8e517d7ad8d57cf352ee861e69e3e10c68aa8b /isa | |
| parent | 681745071f7427b9b65919214547e20a12834360 (diff) | |
| download | riscv-tests-bcebb088e573ed9fc90babaf5f0eae588d605cdc.zip riscv-tests-bcebb088e573ed9fc90babaf5f0eae588d605cdc.tar.gz riscv-tests-bcebb088e573ed9fc90babaf5f0eae588d605cdc.tar.bz2 | |
add vfmsv.{s,d} tests
Diffstat (limited to 'isa')
| -rw-r--r-- | isa/rv64uv/Makefrag | 2 | ||||
| -rw-r--r-- | isa/rv64uv/vfmsv_d.S (renamed from isa/rv64uv/vfmsv.S) | 8 | ||||
| -rw-r--r-- | isa/rv64uv/vfmsv_s.S | 55 |
3 files changed, 60 insertions, 5 deletions
diff --git a/isa/rv64uv/Makefrag b/isa/rv64uv/Makefrag index 978a32b..b65d7c0 100644 --- a/isa/rv64uv/Makefrag +++ b/isa/rv64uv/Makefrag @@ -6,7 +6,7 @@ rv64uv_sc_tests = \ wakeup fence \ vsetcfgi vsetcfg vsetvl keepcfg \ vmvv vmsv \ - vfmvv vfmsv \ + vfmvv vfmsv_d vfmsv_s \ utidx \ lb lbu lh lhu lw lwu ld \ sb sh sw sd \ diff --git a/isa/rv64uv/vfmsv.S b/isa/rv64uv/vfmsv_d.S index 5a8dbeb..e355eb8 100644 --- a/isa/rv64uv/vfmsv.S +++ b/isa/rv64uv/vfmsv_d.S @@ -1,8 +1,8 @@ #***************************************************************************** -# vfmsv.S +# vfmsv_d.S #----------------------------------------------------------------------------- # -# Test vfmsv instruction. +# Test vfmsv.d instruction. # #include "riscv_test.h" @@ -16,7 +16,7 @@ RVTEST_CODE_BEGIN vsetvl a2,a2 li a3,-1 - vfmsv vf0,a3 + vfmsv.d vf0,a3 lui a0,%hi(vtcode) vf %lo(vtcode)(a0) la a4,dest @@ -26,7 +26,7 @@ RVTEST_CODE_BEGIN li a1,0 loop: ld a0,0(a4) - addi x28,a1,2 + addi TESTNUM,a1,2 bne a0,a1,fail addi a4,a4,8 addi a1,a1,1 diff --git a/isa/rv64uv/vfmsv_s.S b/isa/rv64uv/vfmsv_s.S new file mode 100644 index 0000000..8b566fd --- /dev/null +++ b/isa/rv64uv/vfmsv_s.S @@ -0,0 +1,55 @@ +#***************************************************************************** +# vfmsv_s.S +#----------------------------------------------------------------------------- +# +# Test vfmsv.s instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64UV +RVTEST_CODE_BEGIN + + vsetcfg 3,1 + li a2,680 + vsetvl a2,a2 + + li a3,-1 + vfmsv.s vf0,a3 + lui a0,%hi(vtcode) + vf %lo(vtcode)(a0) + la a4,dest + vsd vx2,a4 + fence + + li a1,0 +loop: + ld a0,0(a4) + addi TESTNUM,a1,2 + bne a0,a1,fail + addi a4,a4,8 + addi a1,a1,1 + bne a1,a2,loop + j pass + +vtcode: + utidx x1 + addi x1,x1,1 + fmv.x.s x2, f0 + add x2,x1,x2 + stop + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + + TEST_DATA + +dest: + .skip 16384 + +RVTEST_DATA_END |