diff options
author | Andrew Waterman <andrew@sifive.com> | 2017-01-31 19:48:41 -0800 |
---|---|---|
committer | Andrew Waterman <andrew@sifive.com> | 2017-01-31 19:48:41 -0800 |
commit | b4e820b5a0007d5ca8ab1a5de2327d247a81a9aa (patch) | |
tree | 9effe1b8fab98f7c185e374506d53248dd233f7c /isa/rv64ud | |
parent | cd3e71592208d79ee303ac9ab7dec879c2f8f7a9 (diff) | |
download | riscv-tests-b4e820b5a0007d5ca8ab1a5de2327d247a81a9aa.zip riscv-tests-b4e820b5a0007d5ca8ab1a5de2327d247a81a9aa.tar.gz riscv-tests-b4e820b5a0007d5ca8ab1a5de2327d247a81a9aa.tar.bz2 |
Test qNaN and sNaN inputs to FP comparisons
Diffstat (limited to 'isa/rv64ud')
-rw-r--r-- | isa/rv64ud/fcmp.S | 27 |
1 files changed, 20 insertions, 7 deletions
diff --git a/isa/rv64ud/fcmp.S b/isa/rv64ud/fcmp.S index 173dc88..13bd39b 100644 --- a/isa/rv64ud/fcmp.S +++ b/isa/rv64ud/fcmp.S @@ -17,13 +17,26 @@ RVTEST_CODE_BEGIN # Arithmetic tests #------------------------------------------------------------- - TEST_FP_CMP_OP_D( 2, feq.d, 1, -1.36, -1.36) - TEST_FP_CMP_OP_D( 3, fle.d, 1, -1.36, -1.36) - TEST_FP_CMP_OP_D( 4, flt.d, 0, -1.36, -1.36) - - TEST_FP_CMP_OP_D( 5, feq.d, 0, -1.37, -1.36) - TEST_FP_CMP_OP_D( 6, fle.d, 1, -1.37, -1.36) - TEST_FP_CMP_OP_D( 7, flt.d, 1, -1.37, -1.36) + TEST_FP_CMP_OP_D( 2, feq.d, 0x00, 1, -1.36, -1.36) + TEST_FP_CMP_OP_D( 3, fle.d, 0x00, 1, -1.36, -1.36) + TEST_FP_CMP_OP_D( 4, flt.d, 0x00, 0, -1.36, -1.36) + + TEST_FP_CMP_OP_D( 5, feq.d, 0x00, 0, -1.37, -1.36) + TEST_FP_CMP_OP_D( 6, fle.d, 0x00, 1, -1.37, -1.36) + TEST_FP_CMP_OP_D( 7, flt.d, 0x00, 1, -1.37, -1.36) + + # Only sNaN should signal invalid for feq. + TEST_FP_CMP_OP_D( 8, feq.d, 0x00, 0, NaN, 0) + TEST_FP_CMP_OP_D( 9, feq.d, 0x00, 0, NaN, NaN) + TEST_FP_CMP_OP_D(10, feq.d, 0x10, 0, 0d:7ff0000000000001, 0) + + # qNaN should signal invalid for fle/flt. + TEST_FP_CMP_OP_D(11, flt.d, 0x10, 0, NaN, 0) + TEST_FP_CMP_OP_D(12, flt.d, 0x10, 0, NaN, NaN) + TEST_FP_CMP_OP_D(13, flt.d, 0x10, 0, 0d:7ff0000000000001, 0) + TEST_FP_CMP_OP_D(14, fle.d, 0x10, 0, NaN, 0) + TEST_FP_CMP_OP_D(15, fle.d, 0x10, 0, NaN, NaN) + TEST_FP_CMP_OP_D(16, fle.d, 0x10, 0, 0d:7ff0000000000001, 0) TEST_PASSFAIL |