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author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-07-11 17:45:16 -0700 |
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committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-07-11 17:45:16 -0700 |
commit | 089f4aae4836af1f3f530fbedc3a43a685eae0d1 (patch) | |
tree | 76bc328ba3e17aa6caab7957afb250c6ab0eb6c6 /isa/rv64si/ma_fetch.S | |
parent | a5b7f805c111e14a1478153147a57283a0b9e45d (diff) | |
download | riscv-tests-089f4aae4836af1f3f530fbedc3a43a685eae0d1.zip riscv-tests-089f4aae4836af1f3f530fbedc3a43a685eae0d1.tar.gz riscv-tests-089f4aae4836af1f3f530fbedc3a43a685eae0d1.tar.bz2 |
Remove instruction width assumptions to support RVC
Diffstat (limited to 'isa/rv64si/ma_fetch.S')
-rw-r--r-- | isa/rv64si/ma_fetch.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/isa/rv64si/ma_fetch.S b/isa/rv64si/ma_fetch.S index a97eecb..544daa0 100644 --- a/isa/rv64si/ma_fetch.S +++ b/isa/rv64si/ma_fetch.S @@ -63,6 +63,7 @@ RVTEST_CODE_BEGIN TEST_PASSFAIL + .align 2 stvec_handler: # tests 2 and 4 should trap li a0, 2 |