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| author | Tim Newsome <tim@sifive.com> | 2017-11-01 12:19:16 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2017-11-01 12:19:16 -0700 |
| commit | 97f13c98e7306882f013ab2f6524e483ce1dcceb (patch) | |
| tree | 67efd6cbddbb118564dea4a09d6fe7bb152d130d /debug/testlib.py | |
| parent | caa79b71bfc1f42e70a48980c81f8811df57811f (diff) | |
| download | riscv-tests-97f13c98e7306882f013ab2f6524e483ce1dcceb.zip riscv-tests-97f13c98e7306882f013ab2f6524e483ce1dcceb.tar.gz riscv-tests-97f13c98e7306882f013ab2f6524e483ce1dcceb.tar.bz2 | |
Test register aliases in the simple register tests
Diffstat (limited to 'debug/testlib.py')
0 files changed, 0 insertions, 0 deletions