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| author | Tim Newsome <tim@sifive.com> | 2017-07-03 10:36:03 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2017-07-03 10:36:03 -0700 |
| commit | a744e98f528355335801d9a434fb95f8ad4a5aed (patch) | |
| tree | e526eaf0190ce662db6ba8c6aff0bc210cede277 | |
| parent | 0bca79a33e902a7c43626ef89c51ecb9efd2125e (diff) | |
| download | riscv-tests-a744e98f528355335801d9a434fb95f8ad4a5aed.zip riscv-tests-a744e98f528355335801d9a434fb95f8ad4a5aed.tar.gz riscv-tests-a744e98f528355335801d9a434fb95f8ad4a5aed.tar.bz2 | |
Don't clear triggers during execution.
This shouldn't affect triggers set by the debugger, because running code
can't change those. When it does affect them, it breaks Hwbp1 which sets
the breakpoint before running the program.
| -rwxr-xr-x | debug/programs/entry.S | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/debug/programs/entry.S b/debug/programs/entry.S index ff8ae30..302d409 100755 --- a/debug/programs/entry.S +++ b/debug/programs/entry.S @@ -64,15 +64,6 @@ handle_reset: # initialize stack pointer la sp, stack_top - # Clear all hardware triggers - li t0, ~0 -1: - addi t0, t0, 1 - csrw CSR_TSELECT, t0 - csrw CSR_TDATA1, zero - csrr t1, CSR_TSELECT - beq t0, t1, 1b - # perform the rest of initialization in C j _init |