From 8fea8460dbc6ca23e34a16898e86231daab0594d Mon Sep 17 00:00:00 2001
From: Evgeniy Didin <didin@synopsys.com>
Date: Fri, 10 Jul 2020 14:52:35 +0300
Subject: target/arc: Introduce Actionpoints support

Actionpoint mechanism allows to setup HW breakpoints and watchpoints on Synopsys ARC CPUs.
This mechanism is controlled by DEBUG register and by a set of auxilary registers.
Each actionpoint is controlled by 3 aux registers: Actionpoint(AP) match mask(AP_AMM),
AP match value(AP_AMV) and AP control(AC).

Note: some fields of actionpoint_t structure will be used in further
support of watchpoints.

Change-Id: I4efb24675f247cc19d9122501c9e63c3126fcab4
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-on: http://openocd.zylin.com/5763
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
---
 tcl/cpu/arc/v2.tcl | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

(limited to 'tcl/cpu')

diff --git a/tcl/cpu/arc/v2.tcl b/tcl/cpu/arc/v2.tcl
index ad55361..a3172c2 100644
--- a/tcl/cpu/arc/v2.tcl
+++ b/tcl/cpu/arc/v2.tcl
@@ -30,6 +30,32 @@ proc arc_v2_examine_target { {target ""} } {
 		r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 \
 		gp fp sp ilink r30 blink lp_count pcl
 
+	# Actionpoints
+	if { [arc get-reg-field ap_build version] == 5 } {
+		set ap_build_type [arc get-reg-field ap_build type]
+		# AP_BUILD.TYPE > 0b0110 is reserved in current ISA.
+		# Current ISA supports up to 8 actionpoints.
+		if { $ap_build_type < 8 } {
+			# Two LSB bits of AP_BUILD.TYPE define amount of actionpoints:
+			# 0b00 - 2 actionpoints
+			# 0b01 - 4 actionpoints
+			# 0b10 - 8 actionpoints
+			# 0b11 - reserved.
+			set ap_num [expr 0x2 << ($ap_build_type & 3)]
+			# Expression on top may produce 16 action points - which is a
+			# reserved value for now.
+			if { $ap_num < 16 } {
+				# Enable actionpoint registers
+				for {set i 0} {$i < $ap_num} {incr i} {
+					arc set-reg-exists ap_amv$i ap_amm$i ap_ac$i
+				}
+
+				# Set amount of actionpoints
+				arc num-actionpoints $ap_num
+			}
+		}
+	}
+
 	# DCCM
 	set dccm_version [arc get-reg-field dccm_build version]
 	if { $dccm_version == 3 || $dccm_version == 4 } {
@@ -213,6 +239,30 @@ proc arc_v2_init_regs { } {
 		0x018 aux_dccm	int
 		0x208 aux_iccm	int
 
+		0x220 ap_amv0	uint32
+		0x221 ap_amm0	uint32
+		0x222 ap_ac0	ap_control_t
+		0x223 ap_amv1	uint32
+		0x224 ap_amm1	uint32
+		0x225 ap_ac1	ap_control_t
+		0x226 ap_amv2	uint32
+		0x227 ap_amm2	uint32
+		0x228 ap_ac2	ap_control_t
+		0x229 ap_amv3	uint32
+		0x22A ap_amm3	uint32
+		0x22B ap_ac3	ap_control_t
+		0x22C ap_amv4	uint32
+		0x22D ap_amm4	uint32
+		0x22E ap_ac4	ap_control_t
+		0x22F ap_amv5	uint32
+		0x230 ap_amm5	uint32
+		0x231 ap_ac5	ap_control_t
+		0x232 ap_amv6	uint32
+		0x233 ap_amm6	uint32
+		0x234 ap_ac6	ap_control_t
+		0x235 ap_amv7	uint32
+		0x236 ap_amm7	uint32
+		0x237 ap_ac7	ap_control_t
 
 		0x400 eret		code_ptr
 		0x401 erbta		code_ptr
@@ -285,4 +335,12 @@ proc arc_v2_init_regs { } {
 
 proc arc_v2_reset { {target ""} } {
 	arc_common_reset $target
+
+	# Disable all actionpoints.  Cannot write via regcache yet, because it will
+	# not be flushed and all changes to registers will get lost.  Therefore has
+	# to write directly via JTAG layer...
+	set num_ap [arc num-actionpoints]
+	for {set i 0} {$i < $num_ap} {incr i} {
+		arc jtag set-aux-reg [expr 0x222 + $i * 3] 0
+	}
 }
-- 
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