From c470cd21ae3b2e76551ec73782d48bc4520e7145 Mon Sep 17 00:00:00 2001 From: Evgeniy Naydanov Date: Wed, 8 May 2024 18:46:30 +0300 Subject: Revert "Initialize all registers in examine" This reverts commit 9d4df3420c51e75bcc1d6162fc9cc680d6fd2481. I believe the reasoning behind this workaround is no longer valid. Change-Id: Ie8705f75eb8ad7b72fc8ffcf39125be764cb43be --- src/target/riscv/riscv-011.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c index 64379dc..14af071 100644 --- a/src/target/riscv/riscv-011.c +++ b/src/target/riscv/riscv-011.c @@ -1584,8 +1584,6 @@ static int examine(struct target *target) return result; target_set_examined(target); - for (size_t i = 0; i < 32; ++i) - reg_cache_set(target, i, -1); LOG_INFO("Examined RISCV core; XLEN=%d, misa=0x%" PRIx64, riscv_xlen(target), r->misa); -- cgit v1.1