From dbb42ca18d471b6bffddbd441b1da2ffe18d7400 Mon Sep 17 00:00:00 2001 From: Marc Schink Date: Wed, 7 Dec 2022 13:13:04 +0100 Subject: flash/nor/stm32l4x: Add revision 'X' and 'C' for STM32U575/585 devices Change-Id: I4d950dc0a1421036418f2e5c1f0ed8eca86efc1a Signed-off-by: Marc Schink Reviewed-on: https://review.openocd.org/c/openocd/+/7390 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/flash/nor/stm32l4x.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index 92d511c..c67dbf7 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -327,6 +327,7 @@ static const struct stm32l4_rev stm32g49_g4axx_revs[] = { static const struct stm32l4_rev stm32u57_u58xx_revs[] = { { 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2000, "B" }, + { 0x2001, "X" }, { 0x3000, "C" }, }; static const struct stm32l4_rev stm32wb1xx_revs[] = { -- cgit v1.1 From 69571354f4741f791a4a70c68ca082f765f98c88 Mon Sep 17 00:00:00 2001 From: Marian Buschsieweke Date: Wed, 21 Dec 2022 11:00:53 +0100 Subject: .gitignore: Add .cache and compile_commands.json Enhancing the editor / IDE experience with the use of the language server protocol (lsp) is getting more and more common. The most widely used lsp implementation for C/C++ outside of Redmond is clangd. Clangd uses compile_commands.json, that contains the compiler invocation for each compilation unit, to get the required $CFLAGS to successfully located header files etc. This is best automatically generated from with bear on Makefile based build systems. Hence, there is little value in adding it to the git repo. In addition, clangd generates cache files in the .cache folder. Again, there is no reason in tracking it with git. Change-Id: Ic5165d10aca3a1cc9e9398af9dd2fbf0977608b3 Signed-off-by: Marian Buschsieweke Reviewed-on: https://review.openocd.org/c/openocd/+/7414 Tested-by: jenkins Reviewed-by: Antonio Borneo --- .gitignore | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/.gitignore b/.gitignore index 818bb0c..103dad2 100644 --- a/.gitignore +++ b/.gitignore @@ -103,3 +103,11 @@ GTAGS # checkpatch script files .checkpatch-camelcase.* + +# clangd (e.g. for advanced code completion and linting) generates cache files +# into .cache +.cache + +# A compile_commands.json can be generated using bear and will help tools such +# as clangd to locate header files and use correct $CFLAGS +compile_commands.json -- cgit v1.1 From 7a890a8f256f28b1c8b0dde3b62ab81c7c139d55 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sun, 1 Jan 2023 18:26:53 +0100 Subject: jtag: parse command options in 'swd newdap' The same code is currently used for commands 'jtag newtap' and 'swd newdap' (plus dapdirect versions), but for SWD case the code skips the parsing of the command line as not every flag is used. This has the drawback that syntax errors get unchecked. Move the check about the transport so the command line get always parsed even when the corresponding flags are not useful. Change-Id: I596c3beb04e9e8a9ebe6ee68a61395b679d43b3e Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/7427 Tested-by: jenkins Reviewed-by: Tomas Vanek --- src/jtag/tcl.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c index b1815b7..fc0d562 100644 --- a/src/jtag/tcl.c +++ b/src/jtag/tcl.c @@ -557,13 +557,6 @@ static int jim_newtap_cmd(struct jim_getopt_info *goi) LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params", tap->chip, tap->tapname, tap->dotted_name, goi->argc); - if (!transport_is_jtag()) { - /* SWD doesn't require any JTAG tap parameters */ - tap->enabled = true; - jtag_tap_init(tap); - return JIM_OK; - } - /* IEEE specifies that the two LSBs of an IR scan are 01, so make * that the default. The "-ircapture" and "-irmask" options are only * needed to cope with nonstandard TAPs, or to specify more bits. @@ -618,7 +611,7 @@ static int jim_newtap_cmd(struct jim_getopt_info *goi) tap->enabled = !tap->disabled_after_reset; /* Did all the required option bits get cleared? */ - if (tap->ir_length != 0) { + if (!transport_is_jtag() || tap->ir_length != 0) { jtag_tap_init(tap); return JIM_OK; } -- cgit v1.1 From cda39f929e65316478f2f41f461b0cbb3338806c Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sun, 1 Jan 2023 19:17:18 +0100 Subject: jtag: hla: use generic helper for commands 'jtag newtap' 'swd newdap' The commands 'jtag newtap' and 'swd newdap' have to work either on HLA transport and on standard JTAG/SWD. Having a dedicated implementation for HLA is a non-sense. Reuse the generic code jim_jtag_newtap() and drop the files hla_tcl.[ch] as they are now empty. Change-Id: I9dabbdc2a6f338f23b2fd3ed1a4dc3da0200c080 Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/7428 Tested-by: jenkins --- src/jtag/hla/Makefile.am | 4 +- src/jtag/hla/hla_interface.c | 1 - src/jtag/hla/hla_layout.c | 1 - src/jtag/hla/hla_tcl.c | 143 ------------------------------------------- src/jtag/hla/hla_tcl.h | 17 ----- src/jtag/hla/hla_transport.c | 5 +- 6 files changed, 3 insertions(+), 168 deletions(-) delete mode 100644 src/jtag/hla/hla_tcl.c delete mode 100644 src/jtag/hla/hla_tcl.h diff --git a/src/jtag/hla/Makefile.am b/src/jtag/hla/Makefile.am index 4111786..ea6e11d 100644 --- a/src/jtag/hla/Makefile.am +++ b/src/jtag/hla/Makefile.am @@ -4,10 +4,8 @@ noinst_LTLIBRARIES += %D%/libocdhla.la %C%_libocdhla_la_SOURCES = \ %D%/hla_transport.c \ - %D%/hla_tcl.c \ %D%/hla_interface.c \ %D%/hla_layout.c \ %D%/hla_transport.h \ %D%/hla_interface.h \ - %D%/hla_layout.h \ - %D%/hla_tcl.h + %D%/hla_layout.h diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c index 6198b3d..f4bfeb1 100644 --- a/src/jtag/hla/hla_interface.c +++ b/src/jtag/hla/hla_interface.c @@ -17,7 +17,6 @@ #include #include -#include #include #include #include diff --git a/src/jtag/hla/hla_layout.c b/src/jtag/hla/hla_layout.c index a760f0b..51671d6 100644 --- a/src/jtag/hla/hla_layout.c +++ b/src/jtag/hla/hla_layout.c @@ -18,7 +18,6 @@ #include #include -#include #include #include diff --git a/src/jtag/hla/hla_tcl.c b/src/jtag/hla/hla_tcl.c deleted file mode 100644 index 3283399..0000000 --- a/src/jtag/hla/hla_tcl.c +++ /dev/null @@ -1,143 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later - -/*************************************************************************** - * Copyright (C) 2011 by Mathias Kuester * - * Mathias Kuester * - * * - * Copyright (C) 2012 by Spencer Oliver * - * spen@spen-soft.co.uk * - ***************************************************************************/ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -/* project specific includes */ -#include -#include -#include - -static int jim_newtap_expected_id(struct jim_nvp *n, struct jim_getopt_info *goi, - struct jtag_tap *tap) -{ - jim_wide w; - int e = jim_getopt_wide(goi, &w); - if (e != JIM_OK) { - Jim_SetResultFormatted(goi->interp, "option: %s bad parameter", - n->name); - return e; - } - - uint32_t *p = realloc(tap->expected_ids, - (tap->expected_ids_cnt + 1) * sizeof(uint32_t)); - if (!p) { - Jim_SetResultFormatted(goi->interp, "no memory"); - return JIM_ERR; - } - - tap->expected_ids = p; - tap->expected_ids[tap->expected_ids_cnt++] = w; - - return JIM_OK; -} - -#define NTAP_OPT_IRLEN 0 -#define NTAP_OPT_IRMASK 1 -#define NTAP_OPT_IRCAPTURE 2 -#define NTAP_OPT_ENABLED 3 -#define NTAP_OPT_DISABLED 4 -#define NTAP_OPT_EXPECTED_ID 5 -#define NTAP_OPT_VERSION 6 -#define NTAP_OPT_BYPASS 7 - -static int jim_hl_newtap_cmd(struct jim_getopt_info *goi) -{ - struct jtag_tap *tap; - int x; - int e; - struct jim_nvp *n; - char *cp; - const struct jim_nvp opts[] = { - { .name = "-irlen", .value = NTAP_OPT_IRLEN }, - { .name = "-irmask", .value = NTAP_OPT_IRMASK }, - { .name = "-ircapture", .value = NTAP_OPT_IRCAPTURE }, - { .name = "-enable", .value = NTAP_OPT_ENABLED }, - { .name = "-disable", .value = NTAP_OPT_DISABLED }, - { .name = "-expected-id", .value = NTAP_OPT_EXPECTED_ID }, - { .name = "-ignore-version", .value = NTAP_OPT_VERSION }, - { .name = "-ignore-bypass", .value = NTAP_OPT_BYPASS }, - { .name = NULL, .value = -1}, - }; - - tap = calloc(1, sizeof(struct jtag_tap)); - if (!tap) { - Jim_SetResultFormatted(goi->interp, "no memory"); - return JIM_ERR; - } - - /* - * we expect CHIP + TAP + OPTIONS - * */ - if (goi->argc < 3) { - Jim_SetResultFormatted(goi->interp, - "Missing CHIP TAP OPTIONS ...."); - free(tap); - return JIM_ERR; - } - - const char *tmp; - jim_getopt_string(goi, &tmp, NULL); - tap->chip = strdup(tmp); - - jim_getopt_string(goi, &tmp, NULL); - tap->tapname = strdup(tmp); - - /* name + dot + name + null */ - x = strlen(tap->chip) + 1 + strlen(tap->tapname) + 1; - cp = malloc(x); - sprintf(cp, "%s.%s", tap->chip, tap->tapname); - tap->dotted_name = cp; - - LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params", - tap->chip, tap->tapname, tap->dotted_name, goi->argc); - - while (goi->argc) { - e = jim_getopt_nvp(goi, opts, &n); - if (e != JIM_OK) { - jim_getopt_nvp_unknown(goi, opts, 0); - free(cp); - free(tap); - return e; - } - LOG_DEBUG("Processing option: %s", n->name); - switch (n->value) { - case NTAP_OPT_EXPECTED_ID: - e = jim_newtap_expected_id(n, goi, tap); - if (e != JIM_OK) { - free(cp); - free(tap); - return e; - } - break; - case NTAP_OPT_IRLEN: - case NTAP_OPT_IRMASK: - case NTAP_OPT_IRCAPTURE: - /* dummy read to ignore the next argument */ - jim_getopt_wide(goi, NULL); - break; - } /* switch (n->value) */ - } /* while (goi->argc) */ - - /* default is enabled-after-reset */ - tap->enabled = !tap->disabled_after_reset; - - jtag_tap_init(tap); - return JIM_OK; -} - -int jim_hl_newtap(Jim_Interp *interp, int argc, Jim_Obj * const *argv) -{ - struct jim_getopt_info goi; - jim_getopt_setup(&goi, interp, argc - 1, argv + 1); - return jim_hl_newtap_cmd(&goi); -} diff --git a/src/jtag/hla/hla_tcl.h b/src/jtag/hla/hla_tcl.h deleted file mode 100644 index b028e4b..0000000 --- a/src/jtag/hla/hla_tcl.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -/*************************************************************************** - * Copyright (C) 2011 by Mathias Kuester * - * Mathias Kuester * - * * - * Copyright (C) 2012 by Spencer Oliver * - * spen@spen-soft.co.uk * - ***************************************************************************/ - -#ifndef OPENOCD_JTAG_HLA_HLA_TCL_H -#define OPENOCD_JTAG_HLA_HLA_TCL_H - -/** */ -int jim_hl_newtap(Jim_Interp *interp, int argc, Jim_Obj * const *argv); - -#endif /* OPENOCD_JTAG_HLA_HLA_TCL_H */ diff --git a/src/jtag/hla/hla_transport.c b/src/jtag/hla/hla_transport.c index 91228be..004e9f0 100644 --- a/src/jtag/hla/hla_transport.c +++ b/src/jtag/hla/hla_transport.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include @@ -38,7 +37,7 @@ static const struct command_registration hl_swd_transport_subcommand_handlers[] { .name = "newdap", .mode = COMMAND_CONFIG, - .jim_handler = jim_hl_newtap, + .jim_handler = jim_jtag_newtap, .help = "declare a new SWD DAP", }, COMMAND_REGISTRATION_DONE @@ -59,7 +58,7 @@ static const struct command_registration hl_transport_jtag_subcommand_handlers[] { .name = "newtap", .mode = COMMAND_CONFIG, - .jim_handler = jim_hl_newtap, + .jim_handler = jim_jtag_newtap, .help = "Create a new TAP instance named basename.tap_type, " "and appends it to the scan chain.", .usage = "basename tap_type '-irlen' count " -- cgit v1.1 From 92dd917f5a2af4470b151adc3492f9b3c68caaa9 Mon Sep 17 00:00:00 2001 From: Tomas Vanek Date: Sun, 4 Sep 2022 14:18:26 +0200 Subject: flash/nor/psoc4: drop jtag_poll_mask() from flash write Polling the target makes no harm during PSoC 4 flash write in the current OpenOCD code. Don't mask it. Change-Id: I6625ded0162ee3a96b92188844d0d2d6c30101c2 Signed-off-by: Tomas Vanek Reviewed-on: https://review.openocd.org/c/openocd/+/7162 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/flash/nor/psoc4.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/src/flash/nor/psoc4.c b/src/flash/nor/psoc4.c index c935bd5..fb462c1 100644 --- a/src/flash/nor/psoc4.c +++ b/src/flash/nor/psoc4.c @@ -651,9 +651,6 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer, if (row_offset) memset(row_buffer, bank->default_padded_value, row_offset); - /* Mask automatic polling triggered by execution of halted events */ - bool save_poll_mask = jtag_poll_mask(); - while (count) { uint32_t chunk_size = psoc4_info->row_size - row_offset; if (chunk_size > count) { @@ -693,8 +690,6 @@ static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer, } cleanup: - jtag_poll_unmask(save_poll_mask); - free(sysrq_buffer); return retval; } -- cgit v1.1 From 6e67f1473af15adc7c4052cee27ad84883b286d4 Mon Sep 17 00:00:00 2001 From: Marian Buschsieweke Date: Thu, 22 Dec 2022 13:20:07 +0100 Subject: helper: Add generic little endian CRC32 function This generalizes the little endian CRC32 function used in the OR1K target and moves it to a common helper, so that other places do not need to reinvent the wheel. It is directly used in the OR1K target. Change-Id: I0e55340281a5bfd80669bb1994f3a96fecc1248a Signed-off-by: Marian Buschsieweke Reviewed-on: https://review.openocd.org/c/openocd/+/7415 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/helper/Makefile.am | 2 ++ src/helper/crc32.c | 50 +++++++++++++++++++++++++++++++++++++++ src/helper/crc32.h | 37 +++++++++++++++++++++++++++++ src/target/openrisc/or1k_du_adv.c | 34 +++++--------------------- 4 files changed, 95 insertions(+), 28 deletions(-) create mode 100644 src/helper/crc32.c create mode 100644 src/helper/crc32.h diff --git a/src/helper/Makefile.am b/src/helper/Makefile.am index 7354f54..c4c60d9 100644 --- a/src/helper/Makefile.am +++ b/src/helper/Makefile.am @@ -9,6 +9,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la %D%/configuration.c \ %D%/log.c \ %D%/command.c \ + %D%/crc32.c \ %D%/time_support.c \ %D%/replacements.c \ %D%/fileio.c \ @@ -24,6 +25,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la %D%/types.h \ %D%/log.h \ %D%/command.h \ + %D%/crc32.h \ %D%/time_support.h \ %D%/replacements.h \ %D%/fileio.h \ diff --git a/src/helper/crc32.c b/src/helper/crc32.c new file mode 100644 index 0000000..441a46c --- /dev/null +++ b/src/helper/crc32.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +/*************************************************************************** + * Copyright (C) 2013-2014 by Franck Jullien * + * elec4fun@gmail.com * + * * + * Copyright (C) 2022 Otto-von-Guericke-Universität Magdeburg * + * marian.buschsieweke@ovgu.de * + ***************************************************************************/ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "crc32.h" +#include +#include + +static uint32_t crc_le_step(uint32_t poly, uint32_t crc, uint32_t data_in, + unsigned int data_bits) +{ + for (unsigned int i = 0; i < data_bits; i++) { + uint32_t d, c; + d = ((data_in >> i) & 0x1) ? 0xffffffff : 0; + c = (crc & 0x1) ? 0xffffffff : 0; + crc = crc >> 1; + crc = crc ^ ((d ^ c) & poly); + } + + return crc; +} + +uint32_t crc32_le(uint32_t poly, uint32_t seed, const void *_data, + size_t data_len) +{ + if (((uintptr_t)_data & 0x3) || (data_len & 0x3)) { + /* data is unaligned, processing data one byte at a time */ + const uint8_t *data = _data; + for (size_t i = 0; i < data_len; i++) + seed = crc_le_step(poly, seed, data[i], 8); + } else { + /* data is aligned, processing 32 bit at a time */ + data_len >>= 2; + const uint32_t *data = _data; + for (size_t i = 0; i < data_len; i++) + seed = crc_le_step(poly, seed, data[i], 32); + } + + return seed; +} diff --git a/src/helper/crc32.h b/src/helper/crc32.h new file mode 100644 index 0000000..8f07786 --- /dev/null +++ b/src/helper/crc32.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/*************************************************************************** + * Copyright (C) 2022 Otto-von-Guericke-Universität Magdeburg * + * marian.buschsieweke@ovgu.de * + ***************************************************************************/ + +#ifndef OPENOCD_HELPER_CRC32_H +#define OPENOCD_HELPER_CRC32_H + +#include +#include + +/** @file + * A generic CRC32 implementation + */ + +/** + * CRC32 polynomial commonly used for little endian CRC32 + */ +#define CRC32_POLY_LE 0xedb88320 + +/** + * Calculate the CRC32 value of the given data + * @param poly The polynomial of the CRC + * @param seed The seed to use (mostly either `0` or `0xffffffff`) + * @param data The data to calculate the CRC32 of + * @param data_len The length of the data in @p data in bytes + * @return The CRC value of the first @p data_len bytes at @p data + * @note This function can be used to incrementally compute the CRC one + * chunk of data at a time by using the CRC32 of the previous chunk + * as @p seed for the next chunk. + */ +uint32_t crc32_le(uint32_t poly, uint32_t seed, const void *data, + size_t data_len); + +#endif /* OPENOCD_HELPER_CRC32_H */ diff --git a/src/target/openrisc/or1k_du_adv.c b/src/target/openrisc/or1k_du_adv.c index e4c89e5..e4003a2 100644 --- a/src/target/openrisc/or1k_du_adv.c +++ b/src/target/openrisc/or1k_du_adv.c @@ -22,8 +22,9 @@ #include "or1k_du.h" #include "jsp_server.h" -#include +#include #include +#include #define JSP_BANNER "\n\r" \ "******************************\n\r" \ @@ -67,13 +68,6 @@ #define DBG_CPU_CR_STALL 0x01 #define DBG_CPU_CR_RESET 0x02 -/* Polynomial for the CRC calculation - * Yes, it's backwards. Yes, this is on purpose. - * The hardware is designed this way to save on logic and routing, - * and it's really all the same to us here. - */ -#define ADBG_CRC_POLY 0xedb88320 - /* These are for the internal registers in the Wishbone module * The first is the length of the index register, * the indexes of the various registers are defined after that. @@ -133,20 +127,6 @@ static struct or1k_du or1k_du_adv; static const char * const chain_name[] = {"WISHBONE", "CPU0", "CPU1", "JSP"}; -static uint32_t adbg_compute_crc(uint32_t crc, uint32_t data_in, - int length_bits) -{ - for (int i = 0; i < length_bits; i++) { - uint32_t d, c; - d = ((data_in >> i) & 0x1) ? 0xffffffff : 0; - c = (crc & 0x1) ? 0xffffffff : 0; - crc = crc >> 1; - crc = crc ^ ((d ^ c) & ADBG_CRC_POLY); - } - - return crc; -} - static int find_status_bit(void *_buf, int len) { int i = 0; @@ -522,9 +502,8 @@ retry_read_full: memcpy(data, in_buffer, total_size_bytes); memcpy(&crc_read, &in_buffer[total_size_bytes], 4); - uint32_t crc_calc = 0xffffffff; - for (int i = 0; i < total_size_bytes; i++) - crc_calc = adbg_compute_crc(crc_calc, data[i], 8); + uint32_t crc_calc = crc32_le(CRC32_POLY_LE, 0xffffffff, data, + total_size_bytes); if (crc_calc != crc_read) { LOG_WARNING("CRC ERROR! Computed 0x%08" PRIx32 ", read CRC 0x%08" PRIx32, crc_calc, crc_read); @@ -650,9 +629,8 @@ retry_full_write: field[0].out_value = &value; field[0].in_value = NULL; - uint32_t crc_calc = 0xffffffff; - for (int i = 0; i < (count * size); i++) - crc_calc = adbg_compute_crc(crc_calc, data[i], 8); + uint32_t crc_calc = crc32_le(CRC32_POLY_LE, 0xffffffff, data, + count * size); field[1].num_bits = count * size * 8; field[1].out_value = data; -- cgit v1.1 From bc3c07b1768df878d04aa7cc8e9187e90cd93821 Mon Sep 17 00:00:00 2001 From: Andreas Fritiofson Date: Wed, 18 Jan 2023 09:23:32 +0100 Subject: stm32f3x: Allow overriding the flash bank size Same mechanism as in stm32f1x.cfg reused here. Change-Id: I81f02feb2b655e8259341b22180f3a8b82e28d05 Signed-off-by: Andreas Fritiofson Reviewed-on: https://review.openocd.org/c/openocd/+/7438 Tested-by: jenkins Reviewed-by: Antonio Borneo --- tcl/target/stm32f3x.cfg | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/tcl/target/stm32f3x.cfg b/tcl/target/stm32f3x.cfg index 4ecc7ed..aa978d9 100644 --- a/tcl/target/stm32f3x.cfg +++ b/tcl/target/stm32f3x.cfg @@ -24,6 +24,14 @@ if { [info exists WORKAREASIZE] } { set _WORKAREASIZE 0x4000 } +# Allow overriding the Flash bank size +if { [info exists FLASH_SIZE] } { + set _FLASH_SIZE $FLASH_SIZE +} else { + # autodetect size + set _FLASH_SIZE 0 +} + # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz # # Since we may be running of an RC oscilator, we crank down the speed a @@ -63,7 +71,7 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 set _FLASHNAME $_CHIPNAME.flash -flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME +flash bank $_FLASHNAME stm32f1x 0 $_FLASH_SIZE 0 0 $_TARGETNAME reset_config srst_nogate -- cgit v1.1 From 98d816ff772ffb45b1f4fbba06cb48b30ca7d98f Mon Sep 17 00:00:00 2001 From: N S Date: Wed, 18 Jan 2023 21:58:43 -0800 Subject: doc: fix broken link to IgnoreHardwareSerialNumber in README.Windows URL for Microsoft documentation on IgnoreHardwareSerialNumber redirects to generic USB driver landing page instead of specific article. Update link to go to correct page. Signed-off-by: N S Change-Id: Ifac6c730a1438242cdfe0a0a2867e043e03ceec7 Reviewed-on: https://review.openocd.org/c/openocd/+/7439 Tested-by: jenkins Reviewed-by: Antonio Borneo --- README.Windows | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.Windows b/README.Windows index 7326a35..64bf5c0 100644 --- a/README.Windows +++ b/README.Windows @@ -52,5 +52,5 @@ port depending on which application to use. For more information, see: - http://msdn.microsoft.com/en-us/library/windows/hardware/jj649944(v=vs.85).aspx + https://learn.microsoft.com/en-us/windows-hardware/drivers/usbcon/usb-device-specific-registry-settings http://www.ftdichip.com/Support/Knowledgebase/index.html?ignorehardwareserialnumber.htm -- cgit v1.1 From 41231db3f08150145fe7ddde53cd027e72128d4c Mon Sep 17 00:00:00 2001 From: Erhan Kurubas Date: Fri, 20 Jan 2023 18:33:43 +0100 Subject: doc:usb_adapters: add lsusb dump of esp_usb_jtag Also, esp_usb_jtag added to the supported driver list of "adapter serial" command. Signed-off-by: Erhan Kurubas Change-Id: Ie65cbf9b44f5de6d7995102d1a281161468f6103 Reviewed-on: https://review.openocd.org/c/openocd/+/7440 Tested-by: jenkins Reviewed-by: Antonio Borneo --- doc/openocd.texi | 2 +- .../esp_usb_jtag/303a_1001_esp_usb_jtag.txt | 134 +++++++++++++++++++++ doc/usb_adapters/readme.txt | 1 + 3 files changed, 136 insertions(+), 1 deletion(-) create mode 100644 doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt diff --git a/doc/openocd.texi b/doc/openocd.texi index aa1707b..b9ad3ff 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -2480,7 +2480,7 @@ This command is only available if your libusb1 is at least version 1.0.16. Specifies the @var{serial_string} of the adapter to use. If this command is not specified, serial strings are not checked. Only the following adapter drivers use the serial string from this command: -arm-jtag-ew, cmsis_dap, ft232r, ftdi, hla (stlink, ti-icdi), jlink, kitprog, opendus, +arm-jtag-ew, cmsis_dap, esp_usb_jtag, ft232r, ftdi, hla (stlink, ti-icdi), jlink, kitprog, opendus, openjtag, osbdm, presto, rlink, st-link, usb_blaster (ublast2), usbprog, vsllink, xds110. @end deffn diff --git a/doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt b/doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt new file mode 100644 index 0000000..8da58e5 --- /dev/null +++ b/doc/usb_adapters/esp_usb_jtag/303a_1001_esp_usb_jtag.txt @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR GFDL-1.2-no-invariants-or-later + +# Optional comment + +Bus 002 Device 035: ID 303a:1001 +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 239 Miscellaneous Device + bDeviceSubClass 2 + bDeviceProtocol 1 Interface Association + bMaxPacketSize0 64 + idVendor 0x303a + idProduct 0x1001 + bcdDevice 1.01 + iManufacturer 1 Espressif + iProduct 2 USB JTAG/serial debug unit + iSerial 3 7C:DF:A1:A2:8F:38 + bNumConfigurations 1 + Configuration Descriptor: + bLength 9 + bDescriptorType 2 + wTotalLength 0x0062 + bNumInterfaces 3 + bConfigurationValue 1 + iConfiguration 0 + bmAttributes 0xc0 + Self Powered + MaxPower 500mA + Interface Association: + bLength 8 + bDescriptorType 11 + bFirstInterface 0 + bInterfaceCount 2 + bFunctionClass 2 Communications + bFunctionSubClass 2 Abstract (modem) + bFunctionProtocol 0 + iFunction 0 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 0 + bAlternateSetting 0 + bNumEndpoints 1 + bInterfaceClass 2 Communications + bInterfaceSubClass 2 Abstract (modem) + bInterfaceProtocol 0 + iInterface 0 + CDC Header: + bcdCDC 1.10 + CDC ACM: + bmCapabilities 0x02 + line coding and serial state + CDC Union: + bMasterInterface 0 + bSlaveInterface 1 + CDC Call Management: + bmCapabilities 0x03 + call management + use DataInterface + bDataInterface 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x82 EP 2 IN + bmAttributes 3 + Transfer Type Interrupt + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 1 + bAlternateSetting 0 + bNumEndpoints 2 + bInterfaceClass 10 CDC Data + bInterfaceSubClass 2 + bInterfaceProtocol 0 + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x01 EP 1 OUT + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x81 EP 1 IN + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Interface Descriptor: + bLength 9 + bDescriptorType 4 + bInterfaceNumber 2 + bAlternateSetting 0 + bNumEndpoints 2 + bInterfaceClass 255 Vendor Specific Class + bInterfaceSubClass 255 Vendor Specific Subclass + bInterfaceProtocol 1 + iInterface 0 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x02 EP 2 OUT + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 + Endpoint Descriptor: + bLength 7 + bDescriptorType 5 + bEndpointAddress 0x83 EP 3 IN + bmAttributes 2 + Transfer Type Bulk + Synch Type None + Usage Type Data + wMaxPacketSize 0x0040 1x 64 bytes + bInterval 1 +Device Status: 0x0001 + Self Powered diff --git a/doc/usb_adapters/readme.txt b/doc/usb_adapters/readme.txt index 1d995e9..19df4cf 100644 --- a/doc/usb_adapters/readme.txt +++ b/doc/usb_adapters/readme.txt @@ -15,6 +15,7 @@ OpenOCD gerrit, as explained in HACKING. The dumps are organized in subfolders corresponding to OpenOCD drivers: - cmsis_dap; +- esp_usb_jtag; - ft232r; - ftdi; - icdi; -- cgit v1.1 From 463df952157227866335e398102abe960ffa4131 Mon Sep 17 00:00:00 2001 From: Erhan Kurubas Date: Wed, 5 Oct 2022 17:59:54 +0200 Subject: rtos/nuttx: move stacking info to the new nuttx stackings file Other OSes have separate files to keep stack register offsets. Adding them for NuttX as well will provide a clearer way to expand. Signed-off-by: Erhan Kurubas Change-Id: I1428fefefa199a95431f2073c0279dd7028ad8da Reviewed-on: https://review.openocd.org/c/openocd/+/7250 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/rtos/Makefile.am | 2 ++ src/rtos/nuttx.c | 58 +------------------------------------ src/rtos/rtos_nuttx_stackings.c | 64 +++++++++++++++++++++++++++++++++++++++++ src/rtos/rtos_nuttx_stackings.h | 11 +++++++ 4 files changed, 78 insertions(+), 57 deletions(-) create mode 100644 src/rtos/rtos_nuttx_stackings.c create mode 100644 src/rtos/rtos_nuttx_stackings.h diff --git a/src/rtos/Makefile.am b/src/rtos/Makefile.am index f00d719..fc3ab8b 100644 --- a/src/rtos/Makefile.am +++ b/src/rtos/Makefile.am @@ -10,6 +10,7 @@ noinst_LTLIBRARIES += %D%/librtos.la %D%/rtos_mqx_stackings.c \ %D%/rtos_ucos_iii_stackings.c \ %D%/rtos_riot_stackings.c \ + %D%/rtos_nuttx_stackings.c \ %D%/FreeRTOS.c \ %D%/ThreadX.c \ %D%/eCos.c \ @@ -32,4 +33,5 @@ noinst_LTLIBRARIES += %D%/librtos.la %D%/rtos_mqx_stackings.h \ %D%/rtos_riot_stackings.h \ %D%/rtos_ucos_iii_stackings.h \ + %D%/rtos_nuttx_stackings.h \ %D%/nuttx_header.h diff --git a/src/rtos/nuttx.c b/src/rtos/nuttx.c index 87b28c6..993ff84 100644 --- a/src/rtos/nuttx.c +++ b/src/rtos/nuttx.c @@ -21,7 +21,7 @@ #include "server/gdb_server.h" #include "nuttx_header.h" - +#include "rtos_nuttx_stackings.h" int rtos_thread_packet(struct connection *connection, const char *packet, int packet_size); @@ -85,62 +85,6 @@ static char *task_state_str[] = { #endif /* CONFIG_PAGING */ }; -/* see arch/arm/include/armv7-m/irq_cmnvector.h */ -static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = { - { ARMV7M_R0, 0x28, 32 }, /* r0 */ - { ARMV7M_R1, 0x2c, 32 }, /* r1 */ - { ARMV7M_R2, 0x30, 32 }, /* r2 */ - { ARMV7M_R3, 0x34, 32 }, /* r3 */ - { ARMV7M_R4, 0x08, 32 }, /* r4 */ - { ARMV7M_R5, 0x0c, 32 }, /* r5 */ - { ARMV7M_R6, 0x10, 32 }, /* r6 */ - { ARMV7M_R7, 0x14, 32 }, /* r7 */ - { ARMV7M_R8, 0x18, 32 }, /* r8 */ - { ARMV7M_R9, 0x1c, 32 }, /* r9 */ - { ARMV7M_R10, 0x20, 32 }, /* r10 */ - { ARMV7M_R11, 0x24, 32 }, /* r11 */ - { ARMV7M_R12, 0x38, 32 }, /* r12 */ - { ARMV7M_R13, 0, 32 }, /* sp */ - { ARMV7M_R14, 0x3c, 32 }, /* lr */ - { ARMV7M_PC, 0x40, 32 }, /* pc */ - { ARMV7M_XPSR, 0x44, 32 }, /* xPSR */ -}; - - -static const struct rtos_register_stacking nuttx_stacking_cortex_m = { - .stack_registers_size = 0x48, - .stack_growth_direction = -1, - .num_output_registers = 17, - .register_offsets = nuttx_stack_offsets_cortex_m -}; - -static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = { - { ARMV7M_R0, 0x6c, 32 }, /* r0 */ - { ARMV7M_R1, 0x70, 32 }, /* r1 */ - { ARMV7M_R2, 0x74, 32 }, /* r2 */ - { ARMV7M_R3, 0x78, 32 }, /* r3 */ - { ARMV7M_R4, 0x08, 32 }, /* r4 */ - { ARMV7M_R5, 0x0c, 32 }, /* r5 */ - { ARMV7M_R6, 0x10, 32 }, /* r6 */ - { ARMV7M_R7, 0x14, 32 }, /* r7 */ - { ARMV7M_R8, 0x18, 32 }, /* r8 */ - { ARMV7M_R9, 0x1c, 32 }, /* r9 */ - { ARMV7M_R10, 0x20, 32 }, /* r10 */ - { ARMV7M_R11, 0x24, 32 }, /* r11 */ - { ARMV7M_R12, 0x7c, 32 }, /* r12 */ - { ARMV7M_R13, 0, 32 }, /* sp */ - { ARMV7M_R14, 0x80, 32 }, /* lr */ - { ARMV7M_PC, 0x84, 32 }, /* pc */ - { ARMV7M_XPSR, 0x88, 32 }, /* xPSR */ -}; - -static const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = { - .stack_registers_size = 0x8c, - .stack_growth_direction = -1, - .num_output_registers = 17, - .register_offsets = nuttx_stack_offsets_cortex_m_fpu -}; - static int pid_offset = PID; static int state_offset = STATE; static int name_offset = NAME; diff --git a/src/rtos/rtos_nuttx_stackings.c b/src/rtos/rtos_nuttx_stackings.c new file mode 100644 index 0000000..cb3a2b9 --- /dev/null +++ b/src/rtos/rtos_nuttx_stackings.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "rtos.h" +#include "target/armv7m.h" +#include "rtos_nuttx_stackings.h" + +/* see arch/arm/include/armv7-m/irq_cmnvector.h */ +static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = { + { ARMV7M_R0, 0x28, 32 }, /* r0 */ + { ARMV7M_R1, 0x2c, 32 }, /* r1 */ + { ARMV7M_R2, 0x30, 32 }, /* r2 */ + { ARMV7M_R3, 0x34, 32 }, /* r3 */ + { ARMV7M_R4, 0x08, 32 }, /* r4 */ + { ARMV7M_R5, 0x0c, 32 }, /* r5 */ + { ARMV7M_R6, 0x10, 32 }, /* r6 */ + { ARMV7M_R7, 0x14, 32 }, /* r7 */ + { ARMV7M_R8, 0x18, 32 }, /* r8 */ + { ARMV7M_R9, 0x1c, 32 }, /* r9 */ + { ARMV7M_R10, 0x20, 32 }, /* r10 */ + { ARMV7M_R11, 0x24, 32 }, /* r11 */ + { ARMV7M_R12, 0x38, 32 }, /* r12 */ + { ARMV7M_R13, 0, 32 }, /* sp */ + { ARMV7M_R14, 0x3c, 32 }, /* lr */ + { ARMV7M_PC, 0x40, 32 }, /* pc */ + { ARMV7M_XPSR, 0x44, 32 }, /* xPSR */ +}; + +const struct rtos_register_stacking nuttx_stacking_cortex_m = { + .stack_registers_size = 0x48, + .stack_growth_direction = -1, + .num_output_registers = 17, + .register_offsets = nuttx_stack_offsets_cortex_m, +}; + +static const struct stack_register_offset nuttx_stack_offsets_cortex_m_fpu[] = { + { ARMV7M_R0, 0x6c, 32 }, /* r0 */ + { ARMV7M_R1, 0x70, 32 }, /* r1 */ + { ARMV7M_R2, 0x74, 32 }, /* r2 */ + { ARMV7M_R3, 0x78, 32 }, /* r3 */ + { ARMV7M_R4, 0x08, 32 }, /* r4 */ + { ARMV7M_R5, 0x0c, 32 }, /* r5 */ + { ARMV7M_R6, 0x10, 32 }, /* r6 */ + { ARMV7M_R7, 0x14, 32 }, /* r7 */ + { ARMV7M_R8, 0x18, 32 }, /* r8 */ + { ARMV7M_R9, 0x1c, 32 }, /* r9 */ + { ARMV7M_R10, 0x20, 32 }, /* r10 */ + { ARMV7M_R11, 0x24, 32 }, /* r11 */ + { ARMV7M_R12, 0x7c, 32 }, /* r12 */ + { ARMV7M_R13, 0, 32 }, /* sp */ + { ARMV7M_R14, 0x80, 32 }, /* lr */ + { ARMV7M_PC, 0x84, 32 }, /* pc */ + { ARMV7M_XPSR, 0x88, 32 }, /* xPSR */ +}; + +const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = { + .stack_registers_size = 0x8c, + .stack_growth_direction = -1, + .num_output_registers = 17, + .register_offsets = nuttx_stack_offsets_cortex_m_fpu, +}; diff --git a/src/rtos/rtos_nuttx_stackings.h b/src/rtos/rtos_nuttx_stackings.h new file mode 100644 index 0000000..bfbc049 --- /dev/null +++ b/src/rtos/rtos_nuttx_stackings.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef INCLUDED_RTOS_NUTTX_STACKINGS_H +#define INCLUDED_RTOS_NUTTX_STACKINGS_H + +#include "rtos.h" + +extern const struct rtos_register_stacking nuttx_stacking_cortex_m; +extern const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu; + +#endif /* INCLUDED_RTOS_NUTTX_STACKINGS_H */ -- cgit v1.1 From dfbbfac4d72e247e8094a49c8573b2f49689b6d5 Mon Sep 17 00:00:00 2001 From: Erhan Kurubas Date: Wed, 5 Oct 2022 18:38:23 +0200 Subject: rtos/nuttx: add riscv stacking info Tested with Espressif ESP32-C3 MCU Signed-off-by: Erhan Kurubas Change-Id: Ia71ace4909f2dc93ddc07a2ec5524cf374f1937c Reviewed-on: https://review.openocd.org/c/openocd/+/7251 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/rtos/rtos_nuttx_stackings.c | 46 +++++++++++++++++++++++++++++++++++++++++ src/rtos/rtos_nuttx_stackings.h | 1 + 2 files changed, 47 insertions(+) diff --git a/src/rtos/rtos_nuttx_stackings.c b/src/rtos/rtos_nuttx_stackings.c index cb3a2b9..b59b135 100644 --- a/src/rtos/rtos_nuttx_stackings.c +++ b/src/rtos/rtos_nuttx_stackings.c @@ -7,6 +7,8 @@ #include "rtos.h" #include "target/armv7m.h" #include "rtos_nuttx_stackings.h" +#include "rtos_standard_stackings.h" +#include /* see arch/arm/include/armv7-m/irq_cmnvector.h */ static const struct stack_register_offset nuttx_stack_offsets_cortex_m[] = { @@ -62,3 +64,47 @@ const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu = { .num_output_registers = 17, .register_offsets = nuttx_stack_offsets_cortex_m_fpu, }; + +static const struct stack_register_offset nuttx_stack_offsets_riscv[] = { + { GDB_REGNO_ZERO, -1, 32 }, + { GDB_REGNO_RA, 0x04, 32 }, + { GDB_REGNO_SP, 0x08, 32 }, + { GDB_REGNO_GP, 0x0c, 32 }, + { GDB_REGNO_TP, 0x10, 32 }, + { GDB_REGNO_T0, 0x14, 32 }, + { GDB_REGNO_T1, 0x18, 32 }, + { GDB_REGNO_T2, 0x1c, 32 }, + { GDB_REGNO_FP, 0x20, 32 }, + { GDB_REGNO_S1, 0x24, 32 }, + { GDB_REGNO_A0, 0x28, 32 }, + { GDB_REGNO_A1, 0x2c, 32 }, + { GDB_REGNO_A2, 0x30, 32 }, + { GDB_REGNO_A3, 0x34, 32 }, + { GDB_REGNO_A4, 0x38, 32 }, + { GDB_REGNO_A5, 0x3c, 32 }, + { GDB_REGNO_A6, 0x40, 32 }, + { GDB_REGNO_A7, 0x44, 32 }, + { GDB_REGNO_S2, 0x48, 32 }, + { GDB_REGNO_S3, 0x4c, 32 }, + { GDB_REGNO_S4, 0x50, 32 }, + { GDB_REGNO_S5, 0x54, 32 }, + { GDB_REGNO_S6, 0x58, 32 }, + { GDB_REGNO_S7, 0x5c, 32 }, + { GDB_REGNO_S8, 0x60, 32 }, + { GDB_REGNO_S9, 0x64, 32 }, + { GDB_REGNO_S10, 0x68, 32 }, + { GDB_REGNO_S11, 0x6c, 32 }, + { GDB_REGNO_T3, 0x70, 32 }, + { GDB_REGNO_T4, 0x74, 32 }, + { GDB_REGNO_T5, 0x78, 32 }, + { GDB_REGNO_T6, 0x7c, 32 }, + { GDB_REGNO_PC, 0x00, 32 }, +}; + +const struct rtos_register_stacking nuttx_riscv_stacking = { + .stack_registers_size = 33 * 4, + .stack_growth_direction = -1, + .num_output_registers = 33, + .calculate_process_stack = rtos_generic_stack_align8, + .register_offsets = nuttx_stack_offsets_riscv, +}; diff --git a/src/rtos/rtos_nuttx_stackings.h b/src/rtos/rtos_nuttx_stackings.h index bfbc049..2e5f092 100644 --- a/src/rtos/rtos_nuttx_stackings.h +++ b/src/rtos/rtos_nuttx_stackings.h @@ -7,5 +7,6 @@ extern const struct rtos_register_stacking nuttx_stacking_cortex_m; extern const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu; +extern const struct rtos_register_stacking nuttx_riscv_stacking; #endif /* INCLUDED_RTOS_NUTTX_STACKINGS_H */ -- cgit v1.1