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The driver hla defines the command 'hla_serial' to specify the
serial string of the adapter.
The driver st-link defines the command 'st-link serial' to specify
the serial string of the adapter.
Remove and deprecate the driver commands and use 'adapter serial'.
Change-Id: I9505c398a77125b1ebf4ba71da7baf4d663b75be
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6657
Tested-by: jenkins
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The driver jlink defines the command 'jlink serial' to specify the
serial string of the adapter.
Remove and deprecate the driver command, and use 'adapter serial'.
Note: in former code the commands 'jlink serial' and 'jlink usb'
were mutually exclusive; running one of them would invalidate the
effect of a previous execution of the other. The new code gives
priority to 'adapter serial', even if executed before 'jlink usb'.
Change-Id: I920b0c136716f459b6fd6f7da8a01a7fa1ed389f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6656
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
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The driver xds110 defines the command 'xds110 serial' to specify
the serial string of the adapter.
Remove and deprecate the driver command, and use 'adapter serial'.
Note: the original command 'xds110 serial' used a complex and
undocumented conversion of the serial number through multibyte
string, wide-character string and C cast. The XDS110 I can access
and the lsusb dumps available through Google don't show any
exotic USB serial that require such conversion. The original
developer doesn't remember any constraint that mandates such
conversion (see comments in https://review.openocd.org/4322/).
The conversion is removed by this patch.
Change-Id: I38909918079b2c1797ad85ebec2fea1b33743606
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6655
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
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The driver kitprog defines the command 'kitprog_serial' to specify
the serial string of the adapter.
Remove and deprecate the driver command, and use 'adapter serial'.
Change-Id: I844cb815af01137392b6d12e1b5972fc77ac092d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6652
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
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The driver ftdi defines the command 'ftdi serial' to specify the
serial string of the adapter.
Remove and deprecate the driver command, and use 'adapter serial'.
Change-Id: Ia5b1f325b9fab8f58b5ea70f8b807e50b148b939
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6651
Tested-by: jenkins
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The driver cmsis_dap defines the command 'cmsis_dap_serial' to
specify the serial string of the adapter.
Remove and deprecate the driver command, and use 'adapter serial'.
Change-Id: I88e2d4de360a6c6f23529bb18494962a267250df
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6649
Tested-by: jenkins
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The driver aice defines the command 'aice serial' to specify the
serial string of the adapter, but actually does not use this value
in the code.
Remove and deprecate the driver command, and use 'adapter serial'.
Change-Id: I892e0a4e1b41a7a87adf54a5736abf7419f32979
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6648
Tested-by: jenkins
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GD32E23x from GigaDevice is cortex-M23 microcontroller and it can work with the stm32f1x driver.
Modifications are similar to this done for GD32F1x0 in #6164 (https://review.openocd.org/c/openocd/+/6164).
Configuration file is added because its cortex-M23 CPU ID is different.
I think that GigaDevice microcontrollers should be handled in an independent unit to separate them from STM32,
but nowadays quick solution is welcome.
Signed-off-by: asier70Andrzej Sierżęga <asier70@gmail.com>
Change-Id: I91f31f5f66808bc50a8f607ac2c107e6b7c5e2b8
Reviewed-on: https://review.openocd.org/c/openocd/+/6527
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
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Freeze the IWDG watchdog when cores are halted to prevent a reset
while debugging.
The PMIC present on some board senses the nsrst and forces a power
cycle to the target. The power cycle causes the SWJ-DP to restart
in JTAG mode. If the debugger is using SWD, the mismatch triggers
an error after the reset command.
Ignore the error detected by 'dap init' and proceed executing the
handler. The error in 'dap init' will force a reconnect during the
following 'dap apid', restoring the SWD functionality.
Change-Id: I04fcda6a5b8a1b080ab4e8890ecd0754d5ed12d9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6599
Tested-by: jenkins
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Change-Id: I2e9fd528817b14396c7643801aeea5c8dde668e0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6557
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
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Add the 0x3754 PID used by some STLINK-V3 devices when MSD has been
disabled. This PID has been observed on a Nucleo-G431RB board.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Change-Id: Idb85874fa5a9dff5940bae7e95426a956693b976
Reviewed-on: https://review.openocd.org/c/openocd/+/6555
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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do not force the presence of the reset line, since some custom boards
may do not contain the reset line.
Change-Id: I031ab34012b34a1b49def9db16461f9de0ae29cc
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reported-by: Fleck <fleckz@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/316/
Reviewed-on: https://review.openocd.org/c/openocd/+/6506
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
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known boards are NUCLEO-G431KB, NUCLEO-G431RB and NUCLEO-G474RE
note: this work safely with B-G431B-ESC1, B-G474E-DPOW1,
STM32G474E-EVAL and STM32G484E-EVAL
Change-Id: I132a97e1816620b182983edc8a4b272b52b9241d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5484
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
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known boards are NUCLEO-G031K8, NUCLEO-G070RB, NUCLEO-G071RB
note: this work safely with STM32G0316-DISCO, STM32G071B-DISCO
and STM32G081B-EVAL
Change-Id: I483b6f44409228cd8c2c97b3c560927d1645c517
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5483
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
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Tested with Digilent Arty S7 board.
Change-Id: I064f3b6537ae8d765d7f380ad53b922d584fdbe7
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6509
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Added NPCX flash driver to support the Nuvoton NPCX series
microcontrollers. Add config file for NPCX series.
Change-Id: Ia10b019a3521f59ad1e10ccdc56827ba30c3eac8
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5950
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
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this device flash registers are quite similar to STM32L5
with this changes :
- flash size is up to 2MB
- 2MB variants are always dual bank
- 1MB and 512KB variants could be dual bank (contiguous addressing)
depending on DUALBANK bit(21)
- flash data width is 16 bytes (quad-word)
Change-Id: Id13c552270ce1071479ad418526e8a39ebe83cb1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6108
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
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according the RM0453, the second core have a different Flash CR and SR
registers for flash operations (called C2CR and C2SR).
so we need to a different flash_regs than older L4 devices.
@see stm32wl_cpu2_flash_regs
the C2CR register don't contain LOCK and OPTLOCK bits, and this explain
the addition of new register index called STM32_FLASH_CR_WLK_INDEX to
look-up the CR with lock, to be used in locking/unlocking the flash.
note: DBGMCU_IDCODE cannot be read using CPU1 (Cortex-M0+) at AP1,
to solve this read the UID64 (IEEE 64-bit unique device ID register)
Change-Id: Ifb6e291bf97f814f0b9987b2c40f3037959f7af4
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6050
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
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when RDP level is 0.5 the provided work-area should reside in non-secure RAM
to ensure that:
- add a hint in the driver level
- reduce the usage of secure RAM only when TZEN=1 and RDP is not 0.5
(check the target configuration file)
Change-Id: Idbf2325e609b84ef8480eefdb49a176fdf7e07c7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6035
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
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STM32L5 flash memory is aliased to 0x0C000000, this address mapping
is used for secure applications. (0x08000000 for non-secure)
this change allows the programming of secure and non-secure flash
when trustzone is enabled and RDP level is 0
Change-Id: I89d1f1b5d493cf01a142ca4dbfef5a3731cab96e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5936
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
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Add support for ECP5 FPGA targets and board based on this chips:
Radiona ULX3S and Lambdaconcept ECPIX-5
Change-Id: I932fc6e2458cda7d63ac21579acddea5b53410bc
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6112
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
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Adding Ashling's FTDI based Debug adapter Opella-LD's JTAG and SWD config files
Change-Id: Ie0e82e3b8326de37641901f5c825372cab31de58
Signed-off-by: ranjith.tc@ashling.com
Reviewed-on: http://openocd.zylin.com/6379
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Change-Id: I4eb645f74ef31fc0b5882299b3487020aa142dd8
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6408
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Change-Id: I1a82608532f043054abd22eb5b50ab5c5f58cee4
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6405
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Change-Id: I8e8dee6e8869d2853a7a73c8d4dc8b4891fb0389
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6403
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Change-Id: Ife1e52fe5da0e0374a606072f1faf7c598cf0e2b
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6401
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Change-Id: I27eeab5e3dd554af00799104471ee8f30fbd0c51
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6399
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Change-Id: I2d649117aa8dbdf5484ace068785a1416efa3ecc
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6397
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Change-Id: Icebf6f0a037f4ea9fb450581fcc599417bffc153
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6395
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Change-Id: I3a9d649dd38a913b1ce6d4a2d506bbf44743d529
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6388
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Change-Id: Iffe7a04c36c6ec680497081a99d55b8c69f8f079
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6386
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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... and related SAMA5D27 SoC.
Change-Id: Ic2584e3005ac691642dc2e5a8ee3fb8a4eacaa00
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/5275
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
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OpenOCD cannot connect to BCM2711's JTAG interface on RPi 4B board until
the reset configuration mode is set as trst_only.
According to Table 94. GPIO Pins Alternative Function Assignment of
Broadcom's BCM2711 ARM Peripherals datasheet [1] and Raspberry Pi's GPIO
control in config.txt document [2], only Test Reset (TRST) pin (no
System Reset, SRST) is exposed.
[1] https://datasheets.raspberrypi.org/bcm2711/bcm2711-peripherals.pdf
[2] https://www.raspberrypi.org/documentation/configuration/config-txt/gpio.md
Change-Id: I806f0be9700fa0f0944b42c8a651a5731adc762b
Link: http://openocd.zylin.com/#/c/6364/1
Signed-off-by: Jian-Hong Pan <chienhung.pan@gmail.com>
Reviewed-on: http://openocd.zylin.com/6367
Tested-by: jenkins
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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OpenOCD cannot connect to BCM2837's JTAG interface on RPi 3 board until
the reset configuration mode is set as trst_only.
According to Table 6-31 GPIO Pins Alternative Function Assignment of
Broadcom's BCM2837 ARM Peripherials datasheet [1] and Raspberry Pi's
GPIO control in config.txt document [2], only Test Reset (TRST) pin (no
System Reset, SRST) is exposed.
[1] https://usermanual.wiki/Datasheet/BCM2837ARMPeripheralsBroadcom.1054296467/view
[2] https://www.raspberrypi.org/documentation/configuration/config-txt/gpio.md
Change-Id: I26ff3924039ff7943faf0a5b1ad0427c8dbb88f2
Link: http://openocd.zylin.com/#/c/6364/1
Signed-off-by: Jian-Hong Pan <chienhung.pan@gmail.com>
Reviewed-on: http://openocd.zylin.com/6366
Tested-by: jenkins
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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This adds support for the Blinkinlabs JTAG Hat, a Raspberry Pi
expansion board that provides JTAG and SWD connections via level-
shifting buffers.
Change-Id: I228bf6a18890b7c3d6679bbc63bfe39f726d8323
Signed-off-by: Matthew Mets <matt@blinkinlabs.com>
Reviewed-on: http://openocd.zylin.com/6372
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
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The patch was created automatically using the following
script:
%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---
(cat << EOF
ftdi_device_desc ftdi device_desc
ftdi_serial ftdi serial
ftdi_channel ftdi channel
ftdi_layout_init ftdi layout_init
ftdi_layout_signal ftdi layout_signal
ftdi_set_signal ftdi set_signal
ftdi_get_signal ftdi get_signal
ftdi_vid_pid ftdi vid_pid
ftdi_tdo_sample_edge ftdi tdo_sample_edge
EOF
) | while read a b; do
sed -i "s/$a/$b/g" $(find tcl -type f -name "*.cfg" )
done
%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---
Change-Id: Iff781f37bb5511b7e15cbe6dcdf6d28e89fb174f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6333
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Drive the output enable for TMS and TDI
Change-Id: Ib23afd2f5149d4ce402d88781e68dcf0f074f395
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Reviewed-on: http://openocd.zylin.com/4179
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
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The legacy ft2232 driver suggests that the adapter has tristate
buffers on both nSRST and nTRST, even though they were not used as
such.
Change-Id: I971692ea6b3439ac93311b89877825a5cc21df46
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3663
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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The Flyswatter URL is dead and requires us to use web.archive.org since
the product is discontinued. The Flyswatter 2 is still active and
accessible at a different URL.
Change-Id: Ib2d9de70a9728b0f0ef73f5e479bca81f958442c
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-on: http://openocd.zylin.com/6337
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Add board configuration for Renesas Falcon board based on the R8A779A0 V3U SoC.
Change-Id: If8369f2e2b97dfea9ccbee2c9b916ef7094f9b92
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/6315
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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The V3U SoC is unique in that it now has 8x CA76 and CR52,
while the previous SoCs had CA57/CA53/CR7 . This can still
be handled without too complex modifications to the gen3
configuration file, so add the logic to handle it there.
Change-Id: I7ab33eacc1fd379d369988d3d6690d2e82346c7e
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/6314
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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On SMP Renesas R-Car Gen2/Gen3 systems, select the boot core as
the default target using the 'targets' command. This way, the
user can start debugging code running on the boot core without
having to switch to the boot core by explicitly invoking 'targets'
command first, since it is likely the debugged code will run on
the boot core. Note that most of the code is already in place, it
was just not used, so this is more of a fix to make the original
intention work.
Change-Id: I727808adce617c1d9ebd6ffa34f60f5882cdae60
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/6313
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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* https://store.digilentinc.com/nexys-video-artix-7-fpga-trainer-board-for-multimedia-applications/
* https://reference.digilentinc.com/_media/nexys-video:nexys_video_sch.pdf
The Nexys Video board has FTDI FT2232 whose channel B is connected to
Artix-7 FPGA's JTAG pins, and can be supported by OpenOCD's
ftdi interface. Tested to be working fine on real hardware.
Change-Id: I2996166dc8c2b6c08a9390958adfcdec8fc2bd37
Signed-off-by: Rohit Singh <rohit91.2008@gmail.com>
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/4364
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Initial support for Renesas RZ/G2 MPU family
Change-Id: I5ca74cddfd0c105a5307de56c3ade7084f9c28d2
Signed-off-by: micbis <michele.bisogno.ct@renesas.com>
Reviewed-on: http://openocd.zylin.com/6250
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Fixes: c945d6e61605 ("tcl/target: start using the new TPIU/SWO support")
Change-Id: I4543c9a204f7b4b3b14e6eabc5042653106aff0e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6277
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
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Change-Id: I384c6ad9b4cbabbc004160677f600d8c4bd3eb71
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6268
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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There are still few adapter_khz, ftdi_location, jtag_nsrst_delay
and xds110_serial strolling around ...
Change-Id: I3e8503dcc3875e3c92e6536f3d455a5e448d51ff
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6270
Tested-by: jenkins
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The Xilinx Zynq UltraScale+ SoC have an "AXI-AP" access port for direct memory accesses without halting CPUs.
Change-Id: I6303331c217795657575de4759444938e775dee1
Signed-off-by: Olivier DANET <odanet@caramail.com>
Reviewed-on: http://openocd.zylin.com/6263
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Minor typos found by the new checkpatch boosted by the dictionary
provided by 'codespell'.
While there, fix one indentation.
Change-Id: I72369ed26f363bacd760b40b8c83dd95e89d28a4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6214
Tested-by: jenkins
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Change-Id: I212a96b77282b151a8ecbd46a6436e2bbbda4161
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6221
Tested-by: jenkins
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