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author | Antonio Borneo <borneo.antonio@gmail.com> | 2019-04-02 16:25:52 +0200 |
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committer | Tomas Vanek <vanekt@fbl.cz> | 2019-05-14 19:33:21 +0100 |
commit | 79a92d467dae86eefee57ab7170f61cc51d9b0be (patch) | |
tree | aabe6784a38e15579410ebbb68b794bba648c054 /doc | |
parent | b3ce5a0ae5453a879a36856b5d8453722ba0f9b5 (diff) | |
download | riscv-openocd-79a92d467dae86eefee57ab7170f61cc51d9b0be.zip riscv-openocd-79a92d467dae86eefee57ab7170f61cc51d9b0be.tar.gz riscv-openocd-79a92d467dae86eefee57ab7170f61cc51d9b0be.tar.bz2 |
target: unify memory read/write commands
Current code provides two independent implementations for the
memory read/write commands:
a) jim_target_md()/jim_target_mw() for the target specific
commands "<target> m[dw][bhw]"
b) handle_md_command()/handle_mw_command() for the current target
commands "m[dw][bhwd]"
The case a) misses the handling of doubleword and calls functions
command_print_sameline() with first parameter NULL because defined
as jim handler.
Remove the code in jim_target_md()/jim_target_mw() and use the
same code in b) for the target specific memory read/write.
This approach also provides support for 64-bit data size, not
present in the implementation in a).
The only drawback is that the implementation of memory read in b)
prints the data also as human readable ASCII characters, feature
missing in the implementation in a). This could introduced later
if it's really needed.
Update the documentation to:
- add 64-bit support
- add phys parameter
- add the count parameter
Add attribute "unused" to target_buffer_get_u8(), now not used
anymore.
Change-Id: Ib11ff924c409ad87e77fe708d628b2cc82b74d6a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5050
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'doc')
-rw-r--r-- | doc/openocd.texi | 42 |
1 files changed, 29 insertions, 13 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 479bf34..069208b 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -4688,23 +4688,35 @@ Invokes the handler for the event named @var{event_name}. code, for example by the reset code in @file{startup.tcl}.) @end deffn -@deffn Command {$target_name mdw} addr [count] -@deffnx Command {$target_name mdh} addr [count] -@deffnx Command {$target_name mdb} addr [count] +@deffn Command {$target_name mdd} [phys] addr [count] +@deffnx Command {$target_name mdw} [phys] addr [count] +@deffnx Command {$target_name mdh} [phys] addr [count] +@deffnx Command {$target_name mdb} [phys] addr [count] Display contents of address @var{addr}, as +64-bit doublewords (@command{mdd}), 32-bit words (@command{mdw}), 16-bit halfwords (@command{mdh}), or 8-bit bytes (@command{mdb}). +When the current target has an MMU which is present and active, +@var{addr} is interpreted as a virtual address. +Otherwise, or if the optional @var{phys} flag is specified, +@var{addr} is interpreted as a physical address. If @var{count} is specified, displays that many units. (If you want to manipulate the data instead of displaying it, see the @code{mem2array} primitives.) @end deffn -@deffn Command {$target_name mww} addr word -@deffnx Command {$target_name mwh} addr halfword -@deffnx Command {$target_name mwb} addr byte -Writes the specified @var{word} (32 bits), -@var{halfword} (16 bits), or @var{byte} (8-bit) pattern, +@deffn Command {$target_name mwd} [phys] addr doubleword [count] +@deffnx Command {$target_name mww} [phys] addr word [count] +@deffnx Command {$target_name mwh} [phys] addr halfword [count] +@deffnx Command {$target_name mwb} [phys] addr byte [count] +Writes the specified @var{doubleword} (64 bits), @var{word} (32 bits), +@var{halfword} (16 bits), or @var{byte} (8-bit) value, at the specified address @var{addr}. +When the current target has an MMU which is present and active, +@var{addr} is interpreted as a virtual address. +Otherwise, or if the optional @var{phys} flag is specified, +@var{addr} is interpreted as a physical address. +If @var{count} is specified, fills that many units of consecutive address. @end deffn @anchor{targetevents} @@ -7945,10 +7957,12 @@ Please use their TARGET object siblings to avoid making assumptions about what TAP is the current target, or about MMU configuration. @end enumerate -@deffn Command mdw [phys] addr [count] +@deffn Command mdd [phys] addr [count] +@deffnx Command mdw [phys] addr [count] @deffnx Command mdh [phys] addr [count] @deffnx Command mdb [phys] addr [count] Display contents of address @var{addr}, as +64-bit doublewords (@command{mdd}), 32-bit words (@command{mdw}), 16-bit halfwords (@command{mdh}), or 8-bit bytes (@command{mdb}). When the current target has an MMU which is present and active, @@ -7960,16 +7974,18 @@ If @var{count} is specified, displays that many units. see the @code{mem2array} primitives.) @end deffn -@deffn Command mww [phys] addr word -@deffnx Command mwh [phys] addr halfword -@deffnx Command mwb [phys] addr byte -Writes the specified @var{word} (32 bits), +@deffn Command mwd [phys] addr doubleword [count] +@deffnx Command mww [phys] addr word [count] +@deffnx Command mwh [phys] addr halfword [count] +@deffnx Command mwb [phys] addr byte [count] +Writes the specified @var{doubleword} (64 bits), @var{word} (32 bits), @var{halfword} (16 bits), or @var{byte} (8-bit) value, at the specified address @var{addr}. When the current target has an MMU which is present and active, @var{addr} is interpreted as a virtual address. Otherwise, or if the optional @var{phys} flag is specified, @var{addr} is interpreted as a physical address. +If @var{count} is specified, fills that many units of consecutive address. @end deffn @anchor{imageaccess} |