flash/nor: Add support for TI CC3220SF internal flash

Added cc3220sf flash driver to support the TI CC3220SF
microcontrollers. Implemented flash driver to support the
internal flash of the CC3220SF. The implementation does not
support the serial flash of the CC32xx family that requires
connection over UART, and not via JTAG/SWD debug. Added config
files for both CC32xx devices (no flash) and CC3220SF (with
flash).

Updated to implement comments from code review.
Additional updates to handle remaining comments from review.
Additional updates per review.

Added code to only request aligned writes and full 32-bit
words down to flash helper algorithm. Updated for recent
changes in OpenOCD flash code.

Removed cc32xx.cfg file made obsolete by this patch.
Change-Id: I58fc1478d07238d39c7ef02339f1097a91668c47
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4319
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

3 files changed, 122 insertions, 0 deletions

diff --git a/contrib/loaders/flash/cc3220sf/Makefile b/contrib/loaders/flash/cc3220sf/Makefile
new file mode 100644
index 0000000..d1dcc25
--- /dev/null
+++ b/contrib/loaders/flash/cc3220sf/Makefile
@@ -0,0 +1,19 @@
+BIN2C = ../../../../src/helper/bin2char.sh
+
+CROSS_COMPILE ?= arm-none-eabi-
+AS      = $(CROSS_COMPILE)as
+OBJCOPY = $(CROSS_COMPILE)objcopy
+
+all: cc3220sf.inc
+
+%.elf: %.s
+	$(AS) $< -o $@
+
+%.bin: %.elf
+	$(OBJCOPY) -Obinary $< $@
+
+%.inc: %.bin
+	$(BIN2C) < $< > $@
+
+clean:
+	-rm -f *.elf *.bin *.inc
diff --git a/contrib/loaders/flash/cc3220sf/cc3220sf.inc b/contrib/loaders/flash/cc3220sf/cc3220sf.inc
new file mode 100644
index 0000000..29c54c6
--- /dev/null
+++ b/contrib/loaders/flash/cc3220sf/cc3220sf.inc
@@ -0,0 +1,10 @@
+/* Autogenerated with ../../../../src/helper/bin2char.sh */
+0xdf,0xf8,0x7c,0xa0,0xdf,0xf8,0x7c,0xb0,0xdf,0xf8,0x7c,0xc0,0x01,0xf0,0x7f,0x03,
+0x00,0x2b,0x1e,0xd1,0x4f,0xf0,0x00,0x04,0xcc,0xf8,0x00,0x10,0x03,0x68,0xcb,0xf8,
+0x00,0x30,0x0b,0xf1,0x04,0x0b,0x00,0xf1,0x04,0x00,0xa2,0xf1,0x01,0x02,0x04,0xf1,
+0x01,0x04,0x01,0xf1,0x04,0x01,0x00,0x2a,0x01,0xd0,0x20,0x2c,0xee,0xd1,0xcc,0xf8,
+0x20,0xa0,0xdc,0xf8,0x20,0x30,0x13,0xf0,0x01,0x0f,0xfa,0xd1,0x00,0x2a,0xd7,0xd1,
+0x13,0xe0,0xcc,0xf8,0x00,0x10,0x03,0x68,0xcc,0xf8,0x04,0x30,0xcc,0xf8,0x08,0xa0,
+0xdc,0xf8,0x08,0x30,0x13,0xf0,0x01,0x0f,0xfa,0xd1,0xa2,0xf1,0x01,0x02,0x00,0xf1,
+0x04,0x00,0x01,0xf1,0x04,0x01,0x00,0x2a,0xc2,0xd1,0x00,0xbe,0x01,0xbe,0xfc,0xe7,
+0x01,0x00,0x42,0xa4,0x00,0xd1,0x0f,0x40,0x00,0xd0,0x0f,0x40,
diff --git a/contrib/loaders/flash/cc3220sf/cc3220sf.s b/contrib/loaders/flash/cc3220sf/cc3220sf.s
new file mode 100644
index 0000000..cffcfa0
--- /dev/null
+++ b/contrib/loaders/flash/cc3220sf/cc3220sf.s
@@ -0,0 +1,93 @@
+/***************************************************************************
+ *   Copyright (C) 2017 by Texas Instruments, Inc.                         *
+ *                                                                         *
+ *   This program is free software; you can redistribute it and/or modify  *
+ *   it under the terms of the GNU General Public License as published by  *
+ *   the Free Software Foundation; either version 2 of the License, or     *
+ *   (at your option) any later version.                                   *
+ *                                                                         *
+ *   This program is distributed in the hope that it will be useful,       *
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
+ *   GNU General Public License for more details.                          *
+ *                                                                         *
+ *   You should have received a copy of the GNU General Public License     *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
+ ***************************************************************************/
+
+	/* Params:
+	 * r0 = buffer start address (in)
+	 * r1 = flash destination address (in)
+	 * r2 = number of words to write (in/out)
+	 */
+
+	.text
+	.cpu cortex-m4
+	.code 16
+	.thumb
+	.syntax unified
+
+	.align 2
+
+	/* r3 = scratchpad
+	 * r4 = buffer word counter
+	 * r10 = flash programming key
+	 * r11 = base FWB address
+	 * r12 = base flash regs address
+	 */
+
+start:
+	ldr 	r10, =0xa4420001	/* flash programming key */
+	ldr 	r11, =0x400fd100	/* base of FWB */
+	ldr 	r12, =0x400fd000	/* base of flash regs */
+	and 	r3, r1, #0x7f		/* is the dest address 32 word aligned? */
+	cmp 	r3, #0
+	bne 	program_word		/* if not aligned do one word at a time */
+
+	/* program using the write buffers */
+program_buffer:
+	mov 	r4, #0				/* start the buffer word counter at 0 */
+	str 	r1, [r12]			/* store the dest addr in FMA */
+fill_buffer:
+	ldr 	r3, [r0]			/* get the word to write to FWB */
+	str 	r3, [r11]			/* store the word in the FWB */
+	add 	r11, r11, #4		/* increment the FWB pointer */
+	add 	r0, r0, #4			/* increment the source pointer */
+	sub 	r2, r2, #1			/* decrement the total word counter */
+	add 	r4, r4, #1			/* increment the buffer word counter */
+	add 	r1, r1, #4			/* increment the dest pointer */
+	cmp 	r2, #0				/* is the total word counter now 0? */
+	beq 	buffer_ready		/* go to end if total word counter is 0 */
+	cmp 	r4, #32				/* is the buffer word counter now 32? */
+	bne 	fill_buffer			/* go to continue to fill buffer */
+buffer_ready:
+	str 	r10, [r12, #0x20]	/* store the key and write bit to FMC2 */
+wait_buffer_done:
+	ldr 	r3, [r12, #0x20]	/* read FMC2 */
+	tst 	r3, #1				/* see if the write bit is cleared */
+	bne 	wait_buffer_done	/* go to read FMC2 if bit not cleared */
+	cmp 	r2, #0				/* is the total word counter now 0? */
+	bne 	start				/* go if there is more to program */
+	b   	exit
+
+	/* program just one word */
+program_word:
+	str 	r1, [r12]			/* store the dest addr in FMA */
+	ldr 	r3, [r0]			/* get the word to write to FMD */
+	str 	r3, [r12, #0x4]		/* store the word in FMD */
+	str 	r10, [r12, #0x8]	/* store the key and write bit to FMC */
+wait_word_done:
+	ldr 	r3, [r12, #0x8]		/* read FMC */
+	tst 	r3, #1				/* see if the write bit is cleared */
+	bne 	wait_word_done		/* go to read FMC if bit not cleared */
+	sub 	r2, r2, #1			/* decrement the total word counter */
+	add 	r0, r0, #4			/* increment the source pointer */
+	add 	r1, r1, #4			/* increment the dest pointer */
+	cmp 	r2, #0				/* is the total word counter now 0 */
+	bne 	start				/* go if there is more to program */
+
+	/* end */
+exit:
+	bkpt	#0
+	bkpt	#1
+	b   	exit