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| author | Tomas Vanek <vanekt@fbl.cz> | 2021-11-08 14:24:33 +0100 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2021-11-18 21:07:27 +0000 |
| commit | b502947a1427aabe9c4e9ab0b3dd9e45f51e5b62 (patch) | |
| tree | d74cecf6ea02ee22b3affc65ea49d9ec92535ac1 | |
| parent | aa8a79809ef9e6b97d45da60508d902da0e3270e (diff) | |
| download | riscv-openocd-b502947a1427aabe9c4e9ab0b3dd9e45f51e5b62.zip riscv-openocd-b502947a1427aabe9c4e9ab0b3dd9e45f51e5b62.tar.gz riscv-openocd-b502947a1427aabe9c4e9ab0b3dd9e45f51e5b62.tar.bz2 | |
cortex_m: use cortex_m_write_debug_halt_mask() in cortex_m_single_step_core()
cortex_m_single_step_core() used mem_ap_write_atomic_u32() to manipulate
dhcsr bits unlike the rest of code, where a specialized function
cortex_m_write_debug_halt_mask() takes place.
Unify setting of dhcsr bits and use cortex_m_write_debug_halt_mask() here as well.
Extracted from [1].
[1] Antonio Borneo: 6207: cortex_m: rework handling of dcb_dhcsr
Link: https://review.openocd.org/c/openocd/+/6207
Change-Id: I9ef05ce88a9dce42e1d3d5404a4fe87ec86b5fe8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6676
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
| -rw-r--r-- | src/target/cortex_m.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 3412c56..f682606 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -301,7 +301,6 @@ static int cortex_m_clear_halt(struct target *target) static int cortex_m_single_step_core(struct target *target) { struct cortex_m_common *cortex_m = target_to_cm(target); - struct armv7m_common *armv7m = &cortex_m->armv7m; int retval; /* Mask interrupts before clearing halt, if not done already. This avoids @@ -309,13 +308,11 @@ static int cortex_m_single_step_core(struct target *target) * HALT can put the core into an unknown state. */ if (!(cortex_m->dcb_dhcsr & C_MASKINTS)) { - retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DHCSR, - DBGKEY | C_MASKINTS | C_HALT | C_DEBUGEN); + retval = cortex_m_write_debug_halt_mask(target, C_MASKINTS, 0); if (retval != ERROR_OK) return retval; } - retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DHCSR, - DBGKEY | C_MASKINTS | C_STEP | C_DEBUGEN); + retval = cortex_m_write_debug_halt_mask(target, C_STEP, C_HALT); if (retval != ERROR_OK) return retval; LOG_DEBUG(" "); |