# format of a line in this file: # # # is given by specifying one or more range/value pairs: # highbit..lowbit=value (e.g. 6..0=0x45 9..7=0x0) # # is one of xa,xb,xc,fa,fb,fc,fd,imm,imm20,imm27,shamt,shamtw unimp 31..0=0 j imm25 6..0=0x60 jal imm25 6..0=0x61 jalr.c rd rs1 imm12 9..7=0 6..0=0x62 jalr.r rd rs1 imm12 9..7=1 6..0=0x62 jalr.j rd rs1 imm12 9..7=2 6..0=0x62 beq imm12hi rs1 rs2 imm12lo 9..7=0 6..0=0x63 bne imm12hi rs1 rs2 imm12lo 9..7=1 6..0=0x63 blt imm12hi rs1 rs2 imm12lo 9..7=4 6..0=0x63 bge imm12hi rs1 rs2 imm12lo 9..7=5 6..0=0x63 bltu imm12hi rs1 rs2 imm12lo 9..7=6 6..0=0x63 bgeu imm12hi rs1 rs2 imm12lo 9..7=7 6..0=0x63 lui rd imm20 6..0=0x71 addi rd rs1 imm12 9..7=0 6..0=0x74 slti rd rs1 imm12 9..7=2 6..0=0x74 sltiu rd rs1 imm12 9..7=3 6..0=0x74 andi rd rs1 imm12 9..7=4 6..0=0x74 ori rd rs1 imm12 9..7=5 6..0=0x74 xori rd rs1 imm12 9..7=6 6..0=0x74 slli rd rs1 shamt 15..10=1 9..7=7 6..0=0x74 srli rd rs1 shamt 15..10=2 9..7=7 6..0=0x74 srai rd rs1 shamt 15..10=3 9..7=7 6..0=0x74 add rd rs1 rs2 16..10=0 9..7=0 6..0=0x75 sub rd rs1 rs2 16..10=1 9..7=0 6..0=0x75 slt rd rs1 rs2 16..10=2 9..7=0 6..0=0x75 sltu rd rs1 rs2 16..10=3 9..7=0 6..0=0x75 and rd rs1 rs2 16..10=4 9..7=0 6..0=0x75 or rd rs1 rs2 16..10=5 9..7=0 6..0=0x75 xor rd rs1 rs2 16..10=6 9..7=0 6..0=0x75 sll rd rs1 rs2 16=0 15..10=1 9..7=7 6..0=0x75 srl rd rs1 rs2 16=0 15..10=2 9..7=7 6..0=0x75 sra rd rs1 rs2 16=0 15..10=3 9..7=7 6..0=0x75 mul rd rs1 rs2 16..10=0 9..7=1 6..0=0x75 mulh rd rs1 rs2 16..10=2 9..7=1 6..0=0x75 mulhu rd rs1 rs2 16..10=3 9..7=1 6..0=0x75 div rd rs1 rs2 16..10=4 9..7=1 6..0=0x75 divu rd rs1 rs2 16..10=5 9..7=1 6..0=0x75 rem rd rs1 rs2 16..10=6 9..7=1 6..0=0x75 remu rd rs1 rs2 16..10=7 9..7=1 6..0=0x75 addiw rd rs1 imm12 9..7=0 6..0=0x76 slliw rd rs1 21=0 shamtw 15..10=1 9..7=7 6..0=0x76 srliw rd rs1 21=0 shamtw 15..10=2 9..7=7 6..0=0x76 sraiw rd rs1 21=0 shamtw 15..10=3 9..7=7 6..0=0x76 addw rd rs1 rs2 16..10=0 9..7=0 6..0=0x77 subw rd rs1 rs2 16..10=1 9..7=0 6..0=0x77 sllw rd rs1 rs2 16=0 15..10=1 9..7=7 6..0=0x77 srlw rd rs1 rs2 16=0 15..10=2 9..7=7 6..0=0x77 sraw rd rs1 rs2 16=0 15..10=3 9..7=7 6..0=0x77 mulw rd rs1 rs2 16..10=0 9..7=1 6..0=0x77 divw rd rs1 rs2 16..10=4 9..7=1 6..0=0x77 divuw rd rs1 rs2 16..10=5 9..7=1 6..0=0x77 remw rd rs1 rs2 16..10=6 9..7=1 6..0=0x77 remuw rd rs1 rs2 16..10=7 9..7=1 6..0=0x77 l.b rd rs1 imm12 9..7=0 6..0=0x78 l.h rd rs1 imm12 9..7=1 6..0=0x78 l.w rd rs1 imm12 9..7=2 6..0=0x78 l.d rd rs1 imm12 9..7=3 6..0=0x78 l.bu rd rs1 imm12 9..7=4 6..0=0x78 l.hu rd rs1 imm12 9..7=5 6..0=0x78 l.wu rd rs1 imm12 9..7=6 6..0=0x78 synci 31..27=0 rs1 imm12 9..7=7 6..0=0x78 # NOTE: if you add new store instructions, make sure to modify tc-mips-riscv.c # and elfxx-mips.c to detect them. this is a hack to handle the split immed. # just open up those files and search for MATCH_SW; should be obvious. s.b imm12hi rs1 rs2 imm12lo 9..7=0 6..0=0x79 s.h imm12hi rs1 rs2 imm12lo 9..7=1 6..0=0x79 s.w imm12hi rs1 rs2 imm12lo 9..7=2 6..0=0x79 s.d imm12hi rs1 rs2 imm12lo 9..7=3 6..0=0x79 amoadd.w rd rs1 rs2 16..10=0 9..7=2 6..0=0x7A amoswap.w rd rs1 rs2 16..10=1 9..7=2 6..0=0x7A amoand.w rd rs1 rs2 16..10=2 9..7=2 6..0=0x7A amoor.w rd rs1 rs2 16..10=3 9..7=2 6..0=0x7A amomin.w rd rs1 rs2 16..10=4 9..7=2 6..0=0x7A amomax.w rd rs1 rs2 16..10=5 9..7=2 6..0=0x7A amominu.w rd rs1 rs2 16..10=6 9..7=2 6..0=0x7A amomaxu.w rd rs1 rs2 16..10=7 9..7=2 6..0=0x7A amoadd.d rd rs1 rs2 16..10=0 9..7=3 6..0=0x7A amoswap.d rd rs1 rs2 16..10=1 9..7=3 6..0=0x7A amoand.d rd rs1 rs2 16..10=2 9..7=3 6..0=0x7A amoor.d rd rs1 rs2 16..10=3 9..7=3 6..0=0x7A amomin.d rd rs1 rs2 16..10=4 9..7=3 6..0=0x7A amomax.d rd rs1 rs2 16..10=5 9..7=3 6..0=0x7A amominu.d rd rs1 rs2 16..10=6 9..7=3 6..0=0x7A amomaxu.d rd rs1 rs2 16..10=7 9..7=3 6..0=0x7A rdnpc rd 26..17=0 16..10=0 9..7=0 6..0=0x7B mfcr rd 26..22=0 rs2 16..10=0 9..7=1 6..0=0x7B mtcr 31..27=0 rs1 rs2 16..10=1 9..7=1 6..0=0x7B sync 31..17=0 16..10=0 9..7=2 6..0=0x7B syscall 31..22=0 imm12 9..7=3 6..0=0x7B ei rd 26..17=0 16..10=0 9..7=0 6..0=0x6B di rd 26..17=0 16..10=1 9..7=0 6..0=0x6B mfpcr rd 26..22=0 rs2 16..10=0 9..7=1 6..0=0x6B mtpcr 31..27=0 rs1 rs2 16..10=1 9..7=1 6..0=0x6B eret 31..17=0 16..10=0 9..7=2 6..0=0x6B # 0x7C-0x7F are reserved for >32b instructions fadd.s rd rs1 rs2 16..12=0 rm 8..7=0 6..0=0x6A fsub.s rd rs1 rs2 16..12=1 rm 8..7=0 6..0=0x6A fmul.s rd rs1 rs2 16..12=2 rm 8..7=0 6..0=0x6A fdiv.s rd rs1 rs2 16..12=3 rm 8..7=0 6..0=0x6A fsqrt.s rd rs1 21..17=0 16..12=4 rm 8..7=0 6..0=0x6A fsinj.s rd rs1 rs2 16..12=5 11..9=0 8..7=0 6..0=0x6A fsinjn.s rd rs1 rs2 16..12=6 11..9=0 8..7=0 6..0=0x6A fsmul.s rd rs1 rs2 16..12=7 11..9=0 8..7=0 6..0=0x6A fadd.d rd rs1 rs2 16..12=0x0 rm 8..7=3 6..0=0x6A fsub.d rd rs1 rs2 16..12=0x1 rm 8..7=3 6..0=0x6A fmul.d rd rs1 rs2 16..12=0x2 rm 8..7=3 6..0=0x6A fdiv.d rd rs1 rs2 16..12=0x3 rm 8..7=3 6..0=0x6A fsqrt.d rd rs1 21..17=0 16..12=0x4 rm 8..7=3 6..0=0x6A fsinj.d rd rs1 rs2 16..12=0x5 11..9=0 8..7=3 6..0=0x6A fsinjn.d rd rs1 rs2 16..12=0x6 11..9=0 8..7=3 6..0=0x6A fsmul.d rd rs1 rs2 16..12=0x7 11..9=0 8..7=3 6..0=0x6A fcvt.l.s rd rs1 21..17=0 16..12=0x8 rm 8..7=0 6..0=0x6A fcvtu.l.s rd rs1 21..17=0 16..12=0x9 rm 8..7=0 6..0=0x6A fcvt.w.s rd rs1 21..17=0 16..12=0xA rm 8..7=0 6..0=0x6A fcvtu.w.s rd rs1 21..17=0 16..12=0xB rm 8..7=0 6..0=0x6A fcvt.l.d rd rs1 21..17=0 16..12=0x8 rm 8..7=3 6..0=0x6A fcvtu.l.d rd rs1 21..17=0 16..12=0x9 rm 8..7=3 6..0=0x6A fcvt.w.d rd rs1 21..17=0 16..12=0xA rm 8..7=3 6..0=0x6A fcvtu.w.d rd rs1 21..17=0 16..12=0xB rm 8..7=3 6..0=0x6A fcvt.s.l rd rs1 21..17=0 16..12=0xC rm 8..7=0 6..0=0x6A fcvtu.s.l rd rs1 21..17=0 16..12=0xD rm 8..7=0 6..0=0x6A fcvt.s.w rd rs1 21..17=0 16..12=0xE rm 8..7=0 6..0=0x6A fcvtu.s.w rd rs1 21..17=0 16..12=0xF rm 8..7=0 6..0=0x6A fcvt.d.l rd rs1 21..17=0 16..12=0xC rm 8..7=3 6..0=0x6A fcvtu.d.l rd rs1 21..17=0 16..12=0xD rm 8..7=3 6..0=0x6A fcvt.d.w rd rs1 21..17=0 16..12=0xE 11..9=0 8..7=3 6..0=0x6A fcvtu.d.w rd rs1 21..17=0 16..12=0xF 11..9=0 8..7=3 6..0=0x6A fcvt.s.d rd rs1 21..17=0 16..12=0x13 rm 8..7=0 6..0=0x6A fcvt.d.s rd rs1 21..17=0 16..12=0x10 11..9=0 8..7=3 6..0=0x6A fc.eq.s rd rs1 rs2 16..12=0x15 11..9=0 8..7=0 6..0=0x6A fc.lt.s rd rs1 rs2 16..12=0x16 11..9=0 8..7=0 6..0=0x6A fc.le.s rd rs1 rs2 16..12=0x17 11..9=0 8..7=0 6..0=0x6A fc.eq.d rd rs1 rs2 16..12=0x15 11..9=0 8..7=3 6..0=0x6A fc.lt.d rd rs1 rs2 16..12=0x16 11..9=0 8..7=3 6..0=0x6A fc.le.d rd rs1 rs2 16..12=0x17 11..9=0 8..7=3 6..0=0x6A mff.s rd 26..22=0 rs2 16..12=0x18 11..9=2 8..7=0 6..0=0x6A mff.d rd 26..22=0 rs2 16..12=0x18 11..9=2 8..7=3 6..0=0x6A mffl.d rd 26..22=0 rs2 16..12=0x19 11..9=2 8..7=3 6..0=0x6A mffh.d rd 26..22=0 rs2 16..12=0x1A 11..9=2 8..7=3 6..0=0x6A mtf.s rd rs1 21..17=0 16..12=0x1C 11..9=2 8..7=0 6..0=0x6A mtf.d rd rs1 21..17=0 16..12=0x1C 11..9=2 8..7=3 6..0=0x6A mtflh.d rd rs1 rs2 16..12=0x1C 11..9=3 8..7=3 6..0=0x6A lf.w rd rs1 imm12 9..7=2 6..0=0x68 lf.d rd rs1 imm12 9..7=3 6..0=0x68 sf.w imm12hi rs1 rs2 imm12lo 9..7=2 6..0=0x69 sf.d imm12hi rs1 rs2 imm12lo 9..7=3 6..0=0x69 fsel.s rd rs1 rs2 rs3 11..9=0 8..7=0 6..0=0x67 fsel.d rd rs1 rs2 rs3 11..9=0 8..7=3 6..0=0x67 fmadd.s rd rs1 rs2 rs3 rm 8..7=0 6..0=0x6C fmsub.s rd rs1 rs2 rs3 rm 8..7=0 6..0=0x6D fnmsub.s rd rs1 rs2 rs3 rm 8..7=0 6..0=0x6E fnmadd.s rd rs1 rs2 rs3 rm 8..7=0 6..0=0x6F fmadd.d rd rs1 rs2 rs3 rm 8..7=3 6..0=0x6C fmsub.d rd rs1 rs2 rs3 rm 8..7=3 6..0=0x6D fnmsub.d rd rs1 rs2 rs3 rm 8..7=3 6..0=0x6E fnmadd.d rd rs1 rs2 rs3 rm 8..7=3 6..0=0x6F