From 61915e42bffd5f4a14c9c6508398a211824393fc Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Sun, 24 Apr 2011 16:35:13 -0700 Subject: [xcc,sim,opcodes] added more RVC instructions --- opcodes | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) (limited to 'opcodes') diff --git a/opcodes b/opcodes index 45e6483..364d289 100644 --- a/opcodes +++ b/opcodes @@ -318,8 +318,8 @@ setvl rd rs1 21..10=0 9..7=1 6..2=0x1C 1..0=3 vf 31..27=0 rs1 imm12 9..7=2 6..2=0x1C 1..0=3 # compressed instructions -c.addi cimm6 crd 4..0=0 -c.li cimm6 crd 4..0=1 +c.li cimm6 crd 4..0=0 +c.addi cimm6 crd 4..0=1 c.move 15=0 crs1 crd 4..0=2 c.j 15=1 cimm10 4..0=2 c.ldsp cimm6 crd 4..0=4 @@ -328,7 +328,29 @@ c.sdsp cimm6 crd 4..0=6 c.swsp cimm6 crd 4..0=8 c.ld crds crs1s cimm5 4..0=9 c.lw crds crs1s cimm5 4..0=10 -c.sd crds crs1s cimm5 4..0=12 -c.sw crds crs1s cimm5 4..0=13 +c.sd crs2s crs1s cimm5 4..0=12 +c.sw crs2s crs1s cimm5 4..0=13 c.beq crs2s crs1s cimm5 4..0=16 c.bne crs2s crs1s cimm5 4..0=17 +c.lw0 15=0 crs1 crd 4..0=18 +c.ld0 15=1 crs1 crd 4..0=18 +c.flw crds crs1s cimm5 4..0=20 +c.fld crds crs1s cimm5 4..0=21 +c.fsw crs2s crs1s cimm5 4..0=22 +c.fsd crs2s crs1s cimm5 4..0=24 + +c.slli crds 12..10=0 cimm5 4..0=25 +c.slli32 crds 12..10=1 cimm5 4..0=25 +c.srli crds 12..10=2 cimm5 4..0=25 +c.srli32 crds 12..10=3 cimm5 4..0=25 +c.srai crds 12..10=4 cimm5 4..0=25 +c.srai32 crds 12..10=5 cimm5 4..0=25 +c.slliw crds 12..10=6 cimm5 4..0=25 + +c.add crd crs1 15=0 4..0=26 +c.sub crd crs1 15=1 4..0=26 + +c.add3 crds crs1s crs2bs 9..8=0 4..0=28 +c.sub3 crds crs1s crs2bs 9..8=1 4..0=28 +c.or3 crds crs1s crs2bs 9..8=2 4..0=28 +c.and3 crds crs1s crs2bs 9..8=3 4..0=28 -- cgit v1.1